@inproceedings{b5c129d9386541e0ad62cbe68d640dde,
title = "3-Layer Stacking Technology with Pixel-Wise Interconnections for Image Sensors Using Hybrid Bonding of Silicon-on-Insulator Wafers Mediated by Thin Si Layers",
abstract = "We report a 3-layer stacking technology with pixel-wise interconnections suitable for image sensors. Au/SiO2 hybrid bonding of silicon-on-insulator wafers allows face-to-back as well as face-to-face bonding for multilayer stacking with pixel-wise interconnections. Thin Si layer is introduced as a bonding medium to enhance bonding strength. We have developed 3-layer stacked wafers without delamination thanks to adhesive thin Si layers with 3-layered pixel-parallel image sensors aligned at accuracy of 1 μm or better.",
keywords = "3D integration, hybrid bonding, image sensor, silicon-on-insulator (SOI)",
author = "Masahide Goto and Yuki Honda and Masakazu Nanba and Yoshinori Iguchi and Eiji Higurashi and Takuya Saraya and Masaharu Kobayashi and Hiroshi Toshiyoshi and Toshiro Hiramoto",
note = "Publisher Copyright: {\textcopyright} 2022 IEEE.; 72nd IEEE Electronic Components and Technology Conference, ECTC 2022 ; Conference date: 31-05-2022 Through 03-06-2022",
year = "2022",
doi = "10.1109/ECTC51906.2022.00029",
language = "English",
series = "Proceedings - Electronic Components and Technology Conference",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "122--125",
booktitle = "Proceedings - IEEE 72nd Electronic Components and Technology Conference, ECTC 2022",
}