TY - GEN
T1 - 300 μm Deep through silicon via in laser-ablated CMOS multi-project wafer for cost-effective development of integrated MEMS
AU - Suzuki, Yukio
AU - Fukushi, Hideyuki
AU - Muroyama, Masanori
AU - Hata, Yoshiyuki
AU - Nakayama, Takahiro
AU - Chand, Rakesh
AU - Hirano, Hideki
AU - Nonomura, Yutaka
AU - Funabashi, Hirofumi
AU - Tanaka, Shuji
N1 - Funding Information:
This study was mainly supported by "Formation of Innovation Center for Fusion of Advanced Technologies" program under Japan Science and Technology Agency (JST). The facility used in this study was partly supported by "Nanotechnology Platform" program under the Ministry of Education, Culture, Sports, Science and Technology, Japan.
Publisher Copyright:
© 2017 IEEE.
PY - 2017/2/23
Y1 - 2017/2/23
N2 - This study has opened a possibility to fabricate through silicon vias (TSV) in a LSI wafer available by commercial multi-project wafer (MPW) service and integrate the LSI and MEMS by wafer bonding. 300 μm deep Cu annular type TSV were fabricated in a TSMC 0.18 μm CMOS LSI MPW cut into 4″ diameter. The developed TSV process managed mechanically fragile property of the laser-ablated MPW by low stress TEOS PECVD SiO2 backfilling, surface planarization, temporally wafer support etc. The LSI and MEMS were integrated by Au-Au thermocompression bonding at 300°C, and the completed device worked via the TSV as designed. 'Tohoku TSV CMOS-MEMS platform' presented in this paper gives many chances for cost-effective development of surface-mountable CMOS-integrated MEMS.
AB - This study has opened a possibility to fabricate through silicon vias (TSV) in a LSI wafer available by commercial multi-project wafer (MPW) service and integrate the LSI and MEMS by wafer bonding. 300 μm deep Cu annular type TSV were fabricated in a TSMC 0.18 μm CMOS LSI MPW cut into 4″ diameter. The developed TSV process managed mechanically fragile property of the laser-ablated MPW by low stress TEOS PECVD SiO2 backfilling, surface planarization, temporally wafer support etc. The LSI and MEMS were integrated by Au-Au thermocompression bonding at 300°C, and the completed device worked via the TSV as designed. 'Tohoku TSV CMOS-MEMS platform' presented in this paper gives many chances for cost-effective development of surface-mountable CMOS-integrated MEMS.
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U2 - 10.1109/MEMSYS.2017.7863515
DO - 10.1109/MEMSYS.2017.7863515
M3 - Conference contribution
AN - SCOPUS:85015793344
T3 - Proceedings of the IEEE International Conference on Micro Electro Mechanical Systems (MEMS)
SP - 744
EP - 748
BT - 2017 IEEE 30th International Conference on Micro Electro Mechanical Systems, MEMS 2017
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 30th IEEE International Conference on Micro Electro Mechanical Systems, MEMS 2017
Y2 - 22 January 2017 through 26 January 2017
ER -