A nonvolatile ferroelectric RAM (WFRAM) based on a 1-transistor and 1-capacitor (IT/C) memory cell has potential for fast-access time and small-chip size comparable with DRAM. However, previously reported NVFRAMs are still slower that ordinary DRAMs, since driving a cell plate line NVFRAM is slow. Fortunately, using a non-driven cell plate line write/read (NDP) scheme could lead to NVFRAMs wit as fast access time as DRAMs.
|Number of pages||2|
|Journal||Digest of Technical Papers - IEEE International Solid-State Circuits Conference|
|Publication status||Published - 1996 Feb|
|Event||Proceedings of the 1996 IEEE International Solid-State Circuits Conference - San Francisco, CA, USA|
Duration: 1996 Feb 8 → 1996 Feb 10