60ns 1Mb nonvolatile ferroelectric memory with non-driven cell plate line write/read scheme

Hiroki Koike; Tetsuya Otsuki; Tohru Kimura; Masao Fukuma; Yoshihiro Hayashi; Yukihiko Maejima; Kazushi Amanuma; Nobuhiro Tanabe; Takeo Matsuki; Shinobu Saito; Tsuneo Takeuchi; Souta Kobayashi; Takemitsu Kunio; Takashi Hase; Yoichi Miyasaka; al et al

60ns 1Mb nonvolatile ferroelectric memory with non-driven cell plate line write/read scheme

Hiroki Koike, Tetsuya Otsuki, Tohru Kimura, Masao Fukuma, Yoshihiro Hayashi, Yukihiko Maejima, Kazushi Amanuma, Nobuhiro Tanabe, Takeo Matsuki, Shinobu Saito, Tsuneo Takeuchi, Souta Kobayashi, Takemitsu Kunio, Takashi Hase, Yoichi Miyasaka, al et al

Center for Innovative Integrated Electronic Systems (CIES)

NEC Corporation

Research output: Contribution to journal › Conference article › peer-review

28 Citations (Scopus)

Abstract

A nonvolatile ferroelectric RAM (WFRAM) based on a 1-transistor and 1-capacitor (IT/C) memory cell has potential for fast-access time and small-chip size comparable with DRAM. However, previously reported NVFRAMs are still slower that ordinary DRAMs, since driving a cell plate line NVFRAM is slow. Fortunately, using a non-driven cell plate line write/read (NDP) scheme could lead to NVFRAMs wit as fast access time as DRAMs.

Original language	English
Pages (from-to)	368-369
Number of pages	2
Journal	Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Volume	39
Publication status	Published - 1996 Feb
Event	Proceedings of the 1996 IEEE International Solid-State Circuits Conference - San Francisco, CA, USA Duration: 1996 Feb 8 → 1996 Feb 10

Cite this

Koike, H., Otsuki, T., Kimura, T., Fukuma, M., Hayashi, Y., Maejima, Y., Amanuma, K., Tanabe, N., Matsuki, T., Saito, S., Takeuchi, T., Kobayashi, S., Kunio, T., Hase, T., Miyasaka, Y., & et al, A. (1996). 60ns 1Mb nonvolatile ferroelectric memory with non-driven cell plate line write/read scheme. Digest of Technical Papers - IEEE International Solid-State Circuits Conference, 39, 368-369.

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title = "60ns 1Mb nonvolatile ferroelectric memory with non-driven cell plate line write/read scheme",

abstract = "A nonvolatile ferroelectric RAM (WFRAM) based on a 1-transistor and 1-capacitor (IT/C) memory cell has potential for fast-access time and small-chip size comparable with DRAM. However, previously reported NVFRAMs are still slower that ordinary DRAMs, since driving a cell plate line NVFRAM is slow. Fortunately, using a non-driven cell plate line write/read (NDP) scheme could lead to NVFRAMs wit as fast access time as DRAMs.",

author = "Hiroki Koike and Tetsuya Otsuki and Tohru Kimura and Masao Fukuma and Yoshihiro Hayashi and Yukihiko Maejima and Kazushi Amanuma and Nobuhiro Tanabe and Takeo Matsuki and Shinobu Saito and Tsuneo Takeuchi and Souta Kobayashi and Takemitsu Kunio and Takashi Hase and Yoichi Miyasaka and {et al}, al",

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language = "English",

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pages = "368--369",

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note = "Proceedings of the 1996 IEEE International Solid-State Circuits Conference ; Conference date: 08-02-1996 Through 10-02-1996",

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Koike, H, Otsuki, T, Kimura, T, Fukuma, M, Hayashi, Y, Maejima, Y, Amanuma, K, Tanabe, N, Matsuki, T, Saito, S, Takeuchi, T, Kobayashi, S, Kunio, T, Hase, T, Miyasaka, Y & et al, A 1996, '60ns 1Mb nonvolatile ferroelectric memory with non-driven cell plate line write/read scheme', Digest of Technical Papers - IEEE International Solid-State Circuits Conference, vol. 39, pp. 368-369.

TY - JOUR

T1 - 60ns 1Mb nonvolatile ferroelectric memory with non-driven cell plate line write/read scheme

AU - Koike, Hiroki

AU - Otsuki, Tetsuya

AU - Kimura, Tohru

AU - Fukuma, Masao

AU - Hayashi, Yoshihiro

AU - Maejima, Yukihiko

AU - Amanuma, Kazushi

AU - Tanabe, Nobuhiro

AU - Matsuki, Takeo

AU - Saito, Shinobu

AU - Takeuchi, Tsuneo

AU - Kobayashi, Souta

AU - Kunio, Takemitsu

AU - Hase, Takashi

AU - Miyasaka, Yoichi

AU - et al, al

PY - 1996/2

Y1 - 1996/2

N2 - A nonvolatile ferroelectric RAM (WFRAM) based on a 1-transistor and 1-capacitor (IT/C) memory cell has potential for fast-access time and small-chip size comparable with DRAM. However, previously reported NVFRAMs are still slower that ordinary DRAMs, since driving a cell plate line NVFRAM is slow. Fortunately, using a non-driven cell plate line write/read (NDP) scheme could lead to NVFRAMs wit as fast access time as DRAMs.

AB - A nonvolatile ferroelectric RAM (WFRAM) based on a 1-transistor and 1-capacitor (IT/C) memory cell has potential for fast-access time and small-chip size comparable with DRAM. However, previously reported NVFRAMs are still slower that ordinary DRAMs, since driving a cell plate line NVFRAM is slow. Fortunately, using a non-driven cell plate line write/read (NDP) scheme could lead to NVFRAMs wit as fast access time as DRAMs.

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M3 - Conference article

AN - SCOPUS:0030084512

SN - 0193-6530

VL - 39

SP - 368

EP - 369

JO - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

JF - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

T2 - Proceedings of the 1996 IEEE International Solid-State Circuits Conference

Y2 - 8 February 1996 through 10 February 1996

ER -

60ns 1Mb nonvolatile ferroelectric memory with non-driven cell plate line write/read scheme

Abstract

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