A 28 GHz-Band Direct RF Undersampling S/H CMOS IC with 40 dB SNR

Nagahiro Yoshino; Keita Norishima; Mizuki Motoyoshi; Suguru Kameda; Noriharu Suematsu

doi:10.1109/RFIT.2018.8524070

A 28 GHz-Band Direct RF Undersampling S/H CMOS IC with 40 dB SNR

Nagahiro Yoshino, Keita Norishima, Mizuki Motoyoshi, Suguru Kameda, Noriharu Suematsu

RIEC - Information Communication Platforms Division

Tohoku University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Citations (Scopus)

Abstract

We have studied direct RF undersampling reception to reduce the size and power consumption. We already developed a series/shunt switching type sample and hold (S/H) integrated circuit (IC) by using 90 nm complementary metal oxide semiconductor (CMOS) process for Ka-band (19.4-20.2 GHz) very small aperture terminal (VSAT) application. This IC performed signal-to-noise ratio (SNR) of higher than 27.3 dB. For the higher frequency operation and the reception of multi-level modulated signal, the SNR improvement will be required. In this paper, a 28 GHz-band S/H IC with higher SNR has been developed. In order to improve SNR at higher RF frequency, 65 nm CMOS process is introduced to enhance the switching speed of sampling, the size of hold capacitor is optimized and the two-stage output buffer amplifier is employed. The fabricated S/H IC performs the SNR of higher than 41.2 dB and the error vector magnitude (EVM) of 4.4% (32 Mbaud 64 quadrature amplitude modulation (QAM)) in 28 GHz-band.

Original language	English
Title of host publication	2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781538659717
DOIs	https://doi.org/10.1109/RFIT.2018.8524070
Publication status	Published - 2018 Nov 5
Event	2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018 - Melbourne, Australia Duration: 2018 Aug 15 → 2018 Aug 17

Publication series

Name	2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018

Conference

Conference	2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018
Country/Territory	Australia
City	Melbourne
Period	18/8/15 → 18/8/17

Keywords

CMOS
Digital RF
Receiver
RFIC
Sampling mixer

Access to Document

10.1109/RFIT.2018.8524070

Cite this

Yoshino, N., Norishima, K., Motoyoshi, M., Kameda, S., & Suematsu, N. (2018). A 28 GHz-Band Direct RF Undersampling S/H CMOS IC with 40 dB SNR. In 2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018 Article 8524070 (2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/RFIT.2018.8524070

Yoshino, Nagahiro ; Norishima, Keita ; Motoyoshi, Mizuki et al. / A 28 GHz-Band Direct RF Undersampling S/H CMOS IC with 40 dB SNR. 2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018. Institute of Electrical and Electronics Engineers Inc., 2018. (2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018).

@inproceedings{f856b056b61e4d289df9bee991ef1654,

title = "A 28 GHz-Band Direct RF Undersampling S/H CMOS IC with 40 dB SNR",

abstract = "We have studied direct RF undersampling reception to reduce the size and power consumption. We already developed a series/shunt switching type sample and hold (S/H) integrated circuit (IC) by using 90 nm complementary metal oxide semiconductor (CMOS) process for Ka-band (19.4-20.2 GHz) very small aperture terminal (VSAT) application. This IC performed signal-to-noise ratio (SNR) of higher than 27.3 dB. For the higher frequency operation and the reception of multi-level modulated signal, the SNR improvement will be required. In this paper, a 28 GHz-band S/H IC with higher SNR has been developed. In order to improve SNR at higher RF frequency, 65 nm CMOS process is introduced to enhance the switching speed of sampling, the size of hold capacitor is optimized and the two-stage output buffer amplifier is employed. The fabricated S/H IC performs the SNR of higher than 41.2 dB and the error vector magnitude (EVM) of 4.4% (32 Mbaud 64 quadrature amplitude modulation (QAM)) in 28 GHz-band.",

keywords = "CMOS, Digital RF, Receiver, RFIC, Sampling mixer",

author = "Nagahiro Yoshino and Keita Norishima and Mizuki Motoyoshi and Suguru Kameda and Noriharu Suematsu",

note = "Funding Information: ACKNOWLEDGEMENT This work is supported by the Ministry of Internal Affairs and Communications for the project entitled {"}R&D on Technolo-gies to Densely and Efficiently Utilize Radio Resources of Unlicensed Bands in Dedicated Areas. Publisher Copyright: {\textcopyright} 2018 IEEE.; 2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018 ; Conference date: 15-08-2018 Through 17-08-2018",

year = "2018",

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day = "5",

doi = "10.1109/RFIT.2018.8524070",

language = "English",

series = "2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018",

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Yoshino, N, Norishima, K, Motoyoshi, M, Kameda, S & Suematsu, N 2018, A 28 GHz-Band Direct RF Undersampling S/H CMOS IC with 40 dB SNR. in 2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018., 8524070, 2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018, Institute of Electrical and Electronics Engineers Inc., 2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018, Melbourne, Australia, 18/8/15. https://doi.org/10.1109/RFIT.2018.8524070

A 28 GHz-Band Direct RF Undersampling S/H CMOS IC with 40 dB SNR. / Yoshino, Nagahiro; Norishima, Keita; Motoyoshi, Mizuki et al.
2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018. Institute of Electrical and Electronics Engineers Inc., 2018. 8524070 (2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Motoyoshi, Mizuki

AU - Kameda, Suguru

AU - Suematsu, Noriharu

N1 - Funding Information: ACKNOWLEDGEMENT This work is supported by the Ministry of Internal Affairs and Communications for the project entitled "R&D on Technolo-gies to Densely and Efficiently Utilize Radio Resources of Unlicensed Bands in Dedicated Areas. Publisher Copyright: © 2018 IEEE.

PY - 2018/11/5

Y1 - 2018/11/5

N2 - We have studied direct RF undersampling reception to reduce the size and power consumption. We already developed a series/shunt switching type sample and hold (S/H) integrated circuit (IC) by using 90 nm complementary metal oxide semiconductor (CMOS) process for Ka-band (19.4-20.2 GHz) very small aperture terminal (VSAT) application. This IC performed signal-to-noise ratio (SNR) of higher than 27.3 dB. For the higher frequency operation and the reception of multi-level modulated signal, the SNR improvement will be required. In this paper, a 28 GHz-band S/H IC with higher SNR has been developed. In order to improve SNR at higher RF frequency, 65 nm CMOS process is introduced to enhance the switching speed of sampling, the size of hold capacitor is optimized and the two-stage output buffer amplifier is employed. The fabricated S/H IC performs the SNR of higher than 41.2 dB and the error vector magnitude (EVM) of 4.4% (32 Mbaud 64 quadrature amplitude modulation (QAM)) in 28 GHz-band.

AB - We have studied direct RF undersampling reception to reduce the size and power consumption. We already developed a series/shunt switching type sample and hold (S/H) integrated circuit (IC) by using 90 nm complementary metal oxide semiconductor (CMOS) process for Ka-band (19.4-20.2 GHz) very small aperture terminal (VSAT) application. This IC performed signal-to-noise ratio (SNR) of higher than 27.3 dB. For the higher frequency operation and the reception of multi-level modulated signal, the SNR improvement will be required. In this paper, a 28 GHz-band S/H IC with higher SNR has been developed. In order to improve SNR at higher RF frequency, 65 nm CMOS process is introduced to enhance the switching speed of sampling, the size of hold capacitor is optimized and the two-stage output buffer amplifier is employed. The fabricated S/H IC performs the SNR of higher than 41.2 dB and the error vector magnitude (EVM) of 4.4% (32 Mbaud 64 quadrature amplitude modulation (QAM)) in 28 GHz-band.

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KW - Digital RF

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PB - Institute of Electrical and Electronics Engineers Inc.

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Yoshino N, Norishima K, Motoyoshi M, Kameda S, Suematsu N. A 28 GHz-Band Direct RF Undersampling S/H CMOS IC with 40 dB SNR. In 2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018. Institute of Electrical and Electronics Engineers Inc. 2018. 8524070. (2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018). doi: 10.1109/RFIT.2018.8524070

A 28 GHz-Band Direct RF Undersampling S/H CMOS IC with 40 dB SNR

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Keywords

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