A CMOS image sensor using column-parallel forward noise-canceling circuitry

Tsung Ling Li, Shunichi Wakashima, Yasuyuki Goda, Rihito Kuroda, Shigetoshi Sugawa

Research output: Contribution to journalArticlepeer-review


In this paper, a new column-parallel analog readout architecture, which is composed of a high-gain amplifier, a forward noise-canceling circuitry (FNC), and sample-and-hold (S/H) capacitors, has been presented for low-noise CMOS image sensors (CIS). A FNC has been proposed to provide a sharp noise-filtering for high-frequency noise arising from the readout signal chain, which effectively reduces random noise of the pixel source follower and column amplifier. In order to keep the high-sensitivity and high-dynamic range output, dual-gain readout chains have been adopted. A prototype 400H× 250V CIS using the readout architecture with the FNC was fabricated in a 0.18μm 1-poly 3-metal CMOS process with pinned-photodiodes. The experimental results revealed the input-referred noise of the proposed readout architecture was 65 μVrms, which has been reduced by 24% compared to that of the conventional readout architecture.

Original languageEnglish
Article number04EE14
JournalJapanese Journal of Applied Physics
Issue number4 SPEC. ISSUE
Publication statusPublished - 2014 Apr


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