A fail-safe logic operator using an insulated planar transformer

Norihiro Asada, Hidetoshi Matsuki, Masayoshi Esashi

Research output: Contribution to journalArticlepeer-review

Abstract

A fail-safe logic circuit must switch the output signal to the logical value “0” when the operation circuit fails. Transformer has such favorable characteristics for fail-safe logic circuits that only the magnetic flux change is transmitted and that a superposition of magnetic flux is realized. So we applied those characteristics to a fail-safe logic operator. A new fail-safe logic operator using an insulated planar transformer was developed for a fail-safe majority operation and a fail-safe interlocking. In this paper, the principle, structure, fabrication and fundamental characteristics of the new fail-safe logic operator are described.

Original languageEnglish
Pages (from-to)255-259
Number of pages5
JournalIEEJ Transactions on Industry Applications
Volume114
Issue number3
DOIs
Publication statusPublished - 1994

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