A Fail‐safe Logic Operator Using an Insulated Planar Transformer

A fail‐safe logic circuit must switch the output signal to the logical value “0” when an operation circuit fails. A transformer has such favorable characteristics for fail‐safe logic circuits as only the magnetic flux change is transmitted and a superposition of magnetic flux is realized. Thus those characteristics arc applied to a failsafe logic operator. A new fail‐safe logic operator using an insulated planar transformer was developed for a fail‐safe majority operation and a fail‐safe interlocking. In this paper, the principle, structure, design and fundamental characteristics of the new fail‐safe logic operator are described.