A FASTBUS TDC system

M. Ikeno; S. Inaba; T. Kondo; S. Odaka; H. Sagawa; F. Suekane; Y. Watase

doi:10.1109/TNS.1986.4337214

A FASTBUS TDC system

M. Ikeno, S. Inaba, T. Kondo, S. Odaka, H. Sagawa, F. Suekane, Y. Watase

Research Center for Neutrino Science (RCNS)

Research output: Contribution to journal › Article › peer-review

5 Citations (Scopus)

Abstract

A new time digitizing system is developed for use in new large scale drift chambers of colliding beam experiments at TRISTAN. The system is based upon 64-channel single-hit time-to-amplitude converter(TAC) modules with analog multiplexers and a Scan ADC (SADC). Up to 1536 TAC channels in a FASTBUS crate are scanned and AD converted by a SADC in the same crate. Hardware data processings such as pedestal and slope corrections (Ax+B), address conversions, sparse data scanning and test hit-pattern loading are available.

Original language	English
Pages (from-to)	779-782
Number of pages	4
Journal	IEEE Transactions on Nuclear Science
Volume	33
Issue number	1
DOIs	https://doi.org/10.1109/TNS.1986.4337214
Publication status	Published - 1986 Feb

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author = "M. Ikeno and S. Inaba and T. Kondo and S. Odaka and H. Sagawa and F. Suekane and Y. Watase",

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AU - Ikeno, M.

AU - Inaba, S.

AU - Kondo, T.

AU - Odaka, S.

AU - Sagawa, H.

AU - Suekane, F.

AU - Watase, Y.

PY - 1986/2

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AB - A new time digitizing system is developed for use in new large scale drift chambers of colliding beam experiments at TRISTAN. The system is based upon 64-channel single-hit time-to-amplitude converter(TAC) modules with analog multiplexers and a Scan ADC (SADC). Up to 1536 TAC channels in a FASTBUS crate are scanned and AD converted by a SADC in the same crate. Hardware data processings such as pedestal and slope corrections (Ax+B), address conversions, sparse data scanning and test hit-pattern loading are available.

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A FASTBUS TDC system

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