A high-density ternary content-addressable memory using single-electron transistors

Katsuhiko Degawa; Takafumi Aoki; Hiroshi Inokawa; Katsuhiko Nishiguchi; Tatsuo Higuchi; Yasuo Takahashi

doi:10.1109/ISMVL.2006.6

A high-density ternary content-addressable memory using single-electron transistors

Katsuhiko Degawa, Takafumi Aoki, Hiroshi Inokawa, Katsuhiko Nishiguchi, Tatsuo Higuchi, Yasuo Takahashi

Leadership

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

Abstract

This paper presents a circuit design of a Ternary Content-Addressable Memory (TCAM) using Single-Electron Transistors (SETs). The proposed TCAM cell employs a SET-based ternary memory and a dual-gate SET for ternary data matching. The multi-level functionality of SET is fully utilized to reduce circuit complexity. Basic matching operation of the TCAM cell is verified using a multi-gate SET and a MOSFET fabricated on the same Silicon-On-Insulator (SOI) wafer by Pattern-Dependent OXidation (PADOX) process.

Original language	English
Title of host publication	36th International Symposium on Multiple-Valued Logic, 2006. ISMVL 2006
Number of pages	1
DOIs	https://doi.org/10.1109/ISMVL.2006.6
Publication status	Published - 2006 Nov 21
Event	36th International Symposium on Multiple-Valued Logic, 2006. ISMVL 2006 - Singapore, Singapore Duration: 2006 May 17 → 2006 May 20

Publication series

Name	Proceedings of The International Symposium on Multiple-Valued Logic
ISSN (Print)	0195-623X

Other

Other	36th International Symposium on Multiple-Valued Logic, 2006. ISMVL 2006
Country/Territory	Singapore
City	Singapore
Period	06/5/17 → 06/5/20

ASJC Scopus subject areas

Computer Science(all)
Mathematics(all)

Access to Document

10.1109/ISMVL.2006.6

Cite this

A high-density ternary content-addressable memory using single-electron transistors. / Degawa, Katsuhiko; Aoki, Takafumi; Inokawa, Hiroshi et al.

36th International Symposium on Multiple-Valued Logic, 2006. ISMVL 2006. 2006. 1623971 (Proceedings of The International Symposium on Multiple-Valued Logic).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Degawa, K, Aoki, T, Inokawa, H, Nishiguchi, K, Higuchi, T & Takahashi, Y 2006, A high-density ternary content-addressable memory using single-electron transistors. in 36th International Symposium on Multiple-Valued Logic, 2006. ISMVL 2006., 1623971, Proceedings of The International Symposium on Multiple-Valued Logic, 36th International Symposium on Multiple-Valued Logic, 2006. ISMVL 2006, Singapore, Singapore, 06/5/17. https://doi.org/10.1109/ISMVL.2006.6

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title = "A high-density ternary content-addressable memory using single-electron transistors",

abstract = "This paper presents a circuit design of a Ternary Content-Addressable Memory (TCAM) using Single-Electron Transistors (SETs). The proposed TCAM cell employs a SET-based ternary memory and a dual-gate SET for ternary data matching. The multi-level functionality of SET is fully utilized to reduce circuit complexity. Basic matching operation of the TCAM cell is verified using a multi-gate SET and a MOSFET fabricated on the same Silicon-On-Insulator (SOI) wafer by Pattern-Dependent OXidation (PADOX) process.",

author = "Katsuhiko Degawa and Takafumi Aoki and Hiroshi Inokawa and Katsuhiko Nishiguchi and Tatsuo Higuchi and Yasuo Takahashi",

year = "2006",

month = nov,

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doi = "10.1109/ISMVL.2006.6",

language = "English",

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AU - Degawa, Katsuhiko

AU - Aoki, Takafumi

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AU - Higuchi, Tatsuo

AU - Takahashi, Yasuo

PY - 2006/11/21

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N2 - This paper presents a circuit design of a Ternary Content-Addressable Memory (TCAM) using Single-Electron Transistors (SETs). The proposed TCAM cell employs a SET-based ternary memory and a dual-gate SET for ternary data matching. The multi-level functionality of SET is fully utilized to reduce circuit complexity. Basic matching operation of the TCAM cell is verified using a multi-gate SET and a MOSFET fabricated on the same Silicon-On-Insulator (SOI) wafer by Pattern-Dependent OXidation (PADOX) process.

AB - This paper presents a circuit design of a Ternary Content-Addressable Memory (TCAM) using Single-Electron Transistors (SETs). The proposed TCAM cell employs a SET-based ternary memory and a dual-gate SET for ternary data matching. The multi-level functionality of SET is fully utilized to reduce circuit complexity. Basic matching operation of the TCAM cell is verified using a multi-gate SET and a MOSFET fabricated on the same Silicon-On-Insulator (SOI) wafer by Pattern-Dependent OXidation (PADOX) process.

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T3 - Proceedings of The International Symposium on Multiple-Valued Logic

BT - 36th International Symposium on Multiple-Valued Logic, 2006. ISMVL 2006

T2 - 36th International Symposium on Multiple-Valued Logic, 2006. ISMVL 2006

Y2 - 17 May 2006 through 20 May 2006

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A high-density ternary content-addressable memory using single-electron transistors

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