A high-endurance 96-Kbit FeRAM embedded in a smart card LSI using Ir/IrO2/PZT(MOCVD)/Ir ferroelectric capacitors

H. Mori, N. Tanabe, A. Seike, H. Takeuchi, J. Yamada, T. Miwa, H. Koike, Y. Maejima, T. Tatsumi, S. Kobayashi, T. Nakura, H. Sugiyama, N. Kasai, T. Hase, H. Hada, H. Toyoshima

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Citation (Scopus)

Abstract

We have developed a logic-embedded 96-Kbit FeRAM macro that has low-voltage operation and high-endurance features for smart card applications. The smart card LSI was fabricated using a 0.35 μm-standard CMOS process with 3-level metallization and CMVP ferroelectric capacitors. The operation of the chip was confirmed at voltages from 2.7 to 5.5 V with 2.5 MHz clock cycle. By using Ir-based top and bottom electrodes, the fatigue endurance of the FeRAM was improved, which was confimed in burn-in tests. No failed bits were observed at accelerated conditions with 5.5 V and 150°C after 108 fatigue cycles.

Original languageEnglish
Title of host publication2001 6th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2001 - Proceedings
EditorsHiroshi Iwai, Paul Yu, Bing-Zong Li, Guo-Ping Ru, Xin-Ping Qu
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages195-199
Number of pages5
ISBN (Electronic)0780365208, 9780780365209
DOIs
Publication statusPublished - 2001
Event6th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2001 - Shanghai, China
Duration: 2001 Oct 222001 Oct 25

Publication series

Name2001 6th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2001 - Proceedings
Volume1

Conference

Conference6th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2001
Country/TerritoryChina
CityShanghai
Period01/10/2201/10/25

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