TY - JOUR
T1 - A low-energy variation-tolerant asynchronous TCAM for network intrusion detection systems
AU - Onizawa, Naoya
AU - Gross, Warren J.
AU - Hanyu, Takahiro
PY - 2013
Y1 - 2013
N2 - This paper introduces a low-energy variation-tolerant asynchronous ternary content-addressable memory (TCAM) for Network Intrusion Detection Systems (NIDS). The proposed special-purpose TCAM can detect packet payloads as virus free by inspecting only a few bytes. Hence, it adaptively cancels unnecessary searches, leading to greatly reduction in the search delay time and energy dissipation. For timing robustness with low area overhead, a word circuit that stores a virus pattern is designed based on both a quasi-delay insensitive (QDI) and a bundled-data techniques. The QDI word circuit is realized by combining complementary word circuits for only a small portion of the TCAM that is sensitive to delay variations. For performance evaluation, a probability of the virus detection is calculated using a set of real packet traces from MIT DARPA. A 2048 x 128-byte asynchronous TCAM is designed using TSMC 65nm CMOS technology. The energy dissipation is 93.1% lower and the cycle time is 52.4% lower than those of a deep-pipelined synchronous TCAM with a comparable area. It is also demonstrated that the proposed TCAM tolerates up to 47% variations (3σ) of threshold voltages.
AB - This paper introduces a low-energy variation-tolerant asynchronous ternary content-addressable memory (TCAM) for Network Intrusion Detection Systems (NIDS). The proposed special-purpose TCAM can detect packet payloads as virus free by inspecting only a few bytes. Hence, it adaptively cancels unnecessary searches, leading to greatly reduction in the search delay time and energy dissipation. For timing robustness with low area overhead, a word circuit that stores a virus pattern is designed based on both a quasi-delay insensitive (QDI) and a bundled-data techniques. The QDI word circuit is realized by combining complementary word circuits for only a small portion of the TCAM that is sensitive to delay variations. For performance evaluation, a probability of the virus detection is calculated using a set of real packet traces from MIT DARPA. A 2048 x 128-byte asynchronous TCAM is designed using TSMC 65nm CMOS technology. The energy dissipation is 93.1% lower and the cycle time is 52.4% lower than those of a deep-pipelined synchronous TCAM with a comparable area. It is also demonstrated that the proposed TCAM tolerates up to 47% variations (3σ) of threshold voltages.
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U2 - 10.1109/ASYNC.2013.16
DO - 10.1109/ASYNC.2013.16
M3 - Conference article
AN - SCOPUS:84881263500
SN - 1522-8681
SP - 8
EP - 15
JO - Proceedings - International Symposium on Asynchronous Circuits and Systems
JF - Proceedings - International Symposium on Asynchronous Circuits and Systems
M1 - 6546172
T2 - 19th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2013
Y2 - 19 May 2013 through 22 May 2013
ER -