TY - GEN
T1 - A multi-context FPGA using a floating-gate-MOS functional pass-gate and its CAD environment
AU - Hariyama, Masanori
AU - Kameyama, Michitaka
PY - 2006
Y1 - 2006
N2 - Multi-context FPGAs (MC-FPGAs) have multiple memory bits per configuration bit forming configuration planes for fast switching between contexts. The additional memory planes cause significant overhead in area and power consumption. To overcome the overhead, a fine-grained MC-FPGA architecture using a floating-gate-MOS functional pass gate(FGFP) is presented which merges threshold operation and storage function on a single floating-gate MOS transistor. The test chip is designed using a 0.35μm CMOS-EPROM technology. The transistor count of the proposed multi-context switch (MC-switch) is reduced to 13% in comparison with SRAM-based one. The total area of the proposed MC-FPGA is reduced to about 56% of that of a conventional SRAM-based MC-FPGA.
AB - Multi-context FPGAs (MC-FPGAs) have multiple memory bits per configuration bit forming configuration planes for fast switching between contexts. The additional memory planes cause significant overhead in area and power consumption. To overcome the overhead, a fine-grained MC-FPGA architecture using a floating-gate-MOS functional pass gate(FGFP) is presented which merges threshold operation and storage function on a single floating-gate MOS transistor. The test chip is designed using a 0.35μm CMOS-EPROM technology. The transistor count of the proposed multi-context switch (MC-switch) is reduced to 13% in comparison with SRAM-based one. The total area of the proposed MC-FPGA is reduced to about 56% of that of a conventional SRAM-based MC-FPGA.
KW - Bit-serial architecture
KW - DPGA
KW - FPGA
KW - High-level synthesis
UR - http://www.scopus.com/inward/record.url?scp=50249099189&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=50249099189&partnerID=8YFLogxK
U2 - 10.1109/APCCAS.2006.342169
DO - 10.1109/APCCAS.2006.342169
M3 - Conference contribution
AN - SCOPUS:50249099189
SN - 1424403871
SN - 9781424403875
T3 - IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
SP - 1803
EP - 1806
BT - APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems
T2 - APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems
Y2 - 4 December 2006 through 6 December 2006
ER -