Abstract
In order to realize low cost and high density packaging technology, we propose a new wafer scale chip-on-chip (W-COC) packaging technology using the adhesive injection method. In W-COC packaging technology, chip-on-chip modules more than two hundreds are simultaneously formed at the wafer level. In addition, we can significantly improve the chip performance, because small micro-bumps, more than one million, can be formed on a chip and consequently a number of vertical interconnections can be formed between the two bonded chips. Therefore, it is very easy to introduce the parallel processing function in a W-COC module. Using this technology, we propose a new multichip module (MCM) consisting of single or multiple memory chips directly attached to a logic chip. In this paper, we describe key technologies to realize this new multichip module. We fabricated the W-COC test module and investigated its electrical performance using a micro-bump chain.
Original language | English |
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Pages (from-to) | 2406-2410 |
Number of pages | 5 |
Journal | Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers |
Volume | 38 |
Issue number | 4 B |
DOIs | |
Publication status | Published - 1999 |
Externally published | Yes |
Keywords
- Chip size package (CSP)
- Multichip module (MCM)
- Wafer scale chip-on-chip
ASJC Scopus subject areas
- Engineering(all)
- Physics and Astronomy(all)