Abstract
A real-time visual processing system using a general-purpose vision chip, an image sensor in which photo detectors and processing elements are integrated, is described. In order to control the vision chip and process its output at high speed, a novel architecture called SPARSIS, in which control process of the vision chip is pipelined and integrated with a RISC type integer pipeline, has been developed. This architecture can guarantee real-time operation with high temporal resolution, and even makes possible software-controlled A/D conversion. Sample algorithms demonstrating its fine-grained realtimeness, and experimental results with the implemented system, are also described.
Original language | English |
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Pages (from-to) | 1229-1234 |
Number of pages | 6 |
Journal | Proceedings - IEEE International Conference on Robotics and Automation |
Volume | 2 |
Publication status | Published - 2002 Jan 1 |
Externally published | Yes |
Event | 2002 IEEE International Conference on Robotics and Automation - Washington, DC, United States Duration: 2002 May 11 → 2002 May 15 |
ASJC Scopus subject areas
- Software
- Control and Systems Engineering
- Artificial Intelligence
- Electrical and Electronic Engineering