TY - JOUR
T1 - A Scheduling Method for Instruction-Level Parallel Processing of Vector and Scalar Instructions
AU - Nakaike, Takuya
AU - Sasaki, Takehito
AU - Katahira, Masayuki
AU - Kobayashi, Hiroaki
AU - Nakamura, Tadao
PY - 1999/11/30
Y1 - 1999/11/30
N2 - Jetpipeline is an architecture where fast computation is realized by combining vector processing and instruction-level parallel processing. Consequently, in order to utilize fully the potential performance of Jetpipeline, it is necessary to increase the vectorization ratio and to extract as many parallel executable instructions as possible. In Jetpipeline, the parallel executable instructions are extracted from code composed of mixed vector and scalar instructions. The vector instruction requires a larger number of execution cycles than the scalar instruction, and it is difficult to apply directly the parallelization techniques used in VLIW and other computers. This study seeks to extract fully the performance of Jetpipeline and proposes a parallelization method by effectively combining the vector and scalar instructions. The effectiveness of the method is verified by simulation.
AB - Jetpipeline is an architecture where fast computation is realized by combining vector processing and instruction-level parallel processing. Consequently, in order to utilize fully the potential performance of Jetpipeline, it is necessary to increase the vectorization ratio and to extract as many parallel executable instructions as possible. In Jetpipeline, the parallel executable instructions are extracted from code composed of mixed vector and scalar instructions. The vector instruction requires a larger number of execution cycles than the scalar instruction, and it is difficult to apply directly the parallelization techniques used in VLIW and other computers. This study seeks to extract fully the performance of Jetpipeline and proposes a parallelization method by effectively combining the vector and scalar instructions. The effectiveness of the method is verified by simulation.
KW - Instruction-level parallelism
KW - Jetpipeline
KW - Vector processing
UR - http://www.scopus.com/inward/record.url?scp=0347649463&partnerID=8YFLogxK
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U2 - 10.1002/(SICI)1520-684X(19991130)30:13<23::AID-SCJ3>3.0.CO;2-3
DO - 10.1002/(SICI)1520-684X(19991130)30:13<23::AID-SCJ3>3.0.CO;2-3
M3 - Article
AN - SCOPUS:0347649463
SN - 0882-1666
VL - 30
SP - 23
EP - 33
JO - Systems and Computers in Japan
JF - Systems and Computers in Japan
IS - 13
ER -