TY - JOUR
T1 - A spin transfer torque magnetoresistance random access memory-based high-density and ultralow-power associative memory for fully data-adaptive nearest neighbor search with current-mode similarity evaluation and time-domain minimum searching
AU - Ma, Yitao
AU - Miura, Sadahiko
AU - Honjo, Hiroaki
AU - Ikeda, Shoji
AU - Hanyu, Takahiro
AU - Ohno, Hideo
AU - Endoh, Tetsuo
N1 - Publisher Copyright:
© 2017 The Japan Society of Applied Physics.
PY - 2017/4
Y1 - 2017/4
N2 - A high-density nonvolatile associative memory (NV-AM) based on spin transfer torque magnetoresistive random access memory (STT-MRAM), which achieves highly concurrent and ultralow-power nearest neighbor search with full adaptivity of the template data format, has been proposed and fabricated using the 90nm CMOS/70nm perpendicular-magnetic-tunnel-junction hybrid process. A truly compact current-mode circuitry is developed to realize flexibly controllable and high-parallel similarity evaluation, which makes the NV-AM adaptable to any dimensionality and component-bit of template data. A compact dual-stage time-domain minimum searching circuit is also developed, which can freely extend the system for more template data by connecting multiple NM-AM cores without additional circuits for integrated processing. Both the embedded STTMRAM module and the computing circuit modules in this NV-AM chip are synchronously power-gated to completely eliminate standby power and maximally reduce operation power by only activating the currently accessed circuit blocks. The operations of a prototype chip at 40MHz are demonstrated by measurement. The average operation power is only 130μW, and the circuit density is less than 11μm2/bit. Compared with the latest conventional works in both volatile and nonvolatile approaches, more than 31.3% circuit area reductions and 99.2% power improvements are achieved, respectively. Further power performance analyses are discussed, which verify the special superiority of the proposed NV-AM in lowpower and large-memory-based VLSIs.
AB - A high-density nonvolatile associative memory (NV-AM) based on spin transfer torque magnetoresistive random access memory (STT-MRAM), which achieves highly concurrent and ultralow-power nearest neighbor search with full adaptivity of the template data format, has been proposed and fabricated using the 90nm CMOS/70nm perpendicular-magnetic-tunnel-junction hybrid process. A truly compact current-mode circuitry is developed to realize flexibly controllable and high-parallel similarity evaluation, which makes the NV-AM adaptable to any dimensionality and component-bit of template data. A compact dual-stage time-domain minimum searching circuit is also developed, which can freely extend the system for more template data by connecting multiple NM-AM cores without additional circuits for integrated processing. Both the embedded STTMRAM module and the computing circuit modules in this NV-AM chip are synchronously power-gated to completely eliminate standby power and maximally reduce operation power by only activating the currently accessed circuit blocks. The operations of a prototype chip at 40MHz are demonstrated by measurement. The average operation power is only 130μW, and the circuit density is less than 11μm2/bit. Compared with the latest conventional works in both volatile and nonvolatile approaches, more than 31.3% circuit area reductions and 99.2% power improvements are achieved, respectively. Further power performance analyses are discussed, which verify the special superiority of the proposed NV-AM in lowpower and large-memory-based VLSIs.
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U2 - 10.7567/JJAP.56.04CF08
DO - 10.7567/JJAP.56.04CF08
M3 - Article
AN - SCOPUS:85017182491
SN - 0021-4922
VL - 56
JO - Japanese Journal of Applied Physics
JF - Japanese Journal of Applied Physics
IS - 4
M1 - 04CF08
ER -