A still image encoder based on adaptive resolution vector quantization employing needless calculation elimination architecture

M. Fujibayashi, T. Nozawa, T. Nakayama, K. Mochizuki, K. Kotani, S. Sugawa, T. Ohmi

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

We have developed an advanced vector quantization (VQ) encoding hardware for still image encoding systems. By utilizing needless calculation elimination methods, the computational cost of VQ encoding is reduced to 40% or less, while maintaining the accuracy of full-search VQ. We have successfully implemented the advanced encoding method and adaptive resolution VQ (AR-VQ), which realizes a compression ratio over 1/200 while maintaining image quality, into a still image encoding processor. The processor can compress a still image of 1600 x 2400 pixels within one second, which is 60 times faster than software implementation on current PCs.

Original languageEnglish
Title of host publicationProceedings of the ASP-DAC 2003 Asia and South Pacific Design Automation Conference
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages567-568
Number of pages2
ISBN (Electronic)0780376595
DOIs
Publication statusPublished - 2003
EventAsia and South Pacific Design Automation Conference, ASP-DAC 2003 - Kitakyushu, Japan
Duration: 2003 Jan 212003 Jan 24

Publication series

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Volume2003-January

Conference

ConferenceAsia and South Pacific Design Automation Conference, ASP-DAC 2003
Country/TerritoryJapan
CityKitakyushu
Period03/1/2103/1/24

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