TY - GEN
T1 - A wafer-level MEMS-LSI integration platform using fly-cut bonding metals customizable for diverse applications
AU - Hirano, Hideki
AU - Suzuki, Yukio
AU - Chand, Rakesh
AU - Tanaka, Shuji
N1 - Funding Information:
This study was performed in R&D Center of Excellence for Integrated Microsystems, Tohoku University under the program “Formation of Innovation Center for Fusion of Advanced Technologies” supported by Special Coordination Funds for Promoting Science and Technology, and partially supported by the New Energy and Industrial Technology Development Organization (NEDO). The facility used in this study was partly supported by “Nanotechnology Platform” of the Ministry of Education, Culture, Sports, Science and Technology (MEXT), Japan. The authors would like to express their gratitude to M.S. Al Farisi and C. Liu of Tohoku University for their help with experiments.
PY - 2017
Y1 - 2017
N2 - This paper describes low-temperature metal thermo-compression bonding technology using fly-cut planarized electroplated metal bonding frames for wafer-level integration of heterogeneous elements such as MEMS and CMOS-LSI. The process has a significant advantage over the other established integration processes in vacuum packaging for non-planer (i.e. stepped or micro-structured) wafers and temperature-sensitive fragile wafers. A cost-effective MEMS-LSI integration platform utilizing the developed wafer-level bonding technology for the integration of various MEMS elements with a commercial multi-project CMOS wafer has been also developed. The platform is suitable for the prototyping or small-scale production of future heterogeneously integrated devices such as intelligent and autonomy sensors.
AB - This paper describes low-temperature metal thermo-compression bonding technology using fly-cut planarized electroplated metal bonding frames for wafer-level integration of heterogeneous elements such as MEMS and CMOS-LSI. The process has a significant advantage over the other established integration processes in vacuum packaging for non-planer (i.e. stepped or micro-structured) wafers and temperature-sensitive fragile wafers. A cost-effective MEMS-LSI integration platform utilizing the developed wafer-level bonding technology for the integration of various MEMS elements with a commercial multi-project CMOS wafer has been also developed. The platform is suitable for the prototyping or small-scale production of future heterogeneously integrated devices such as intelligent and autonomy sensors.
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M3 - Conference contribution
AN - SCOPUS:85032266376
T3 - International Conference and Exhibition on Integration Issues of Miniaturized Systems 2017, SSI 2017
SP - 151
EP - 158
BT - International Conference and Exhibition on Integration Issues of Miniaturized Systems 2017, SSI 2017
A2 - Otto, Thomas
PB - Mesago Messe Frankfurt GmbH
T2 - International Conference and Exhibition on Integration Issues of Miniaturized Systems 2017, SSI 2017
Y2 - 8 March 2017 through 9 March 2017
ER -