TY - JOUR
T1 - Above-complementary metal-oxide-semiconductor metal pattern technique for postfabrication tuning of on-chip inductor characteristics
AU - Kotani, Koji
AU - Sugimoto, Atsuo
AU - Omiya, Yutaka
AU - Ito, Takashi
PY - 2011/4
Y1 - 2011/4
N2 - In the design of radio frequency (RF) circuits, modifying the characteristics of an inductor in efficient way is required to realize rapid prototyping of RF system-on-a-chip (SoC). We propose an above-complementary- metal-oxide-semiconductor (above-CMOS) metal pattern technique. In this technique, metal patterns are formed using a simple process on the passivation layer above the on-chip inductor. Since the metal pattern with different shapes has different effects, we can tune the characteristics of an on-chip inductor by forming various metal patterns in a chip-by-chip manner. This method can experimentally create various inductors from an identical on-chip inductor. Therefore, the optimization of inductor characteristics and related circuit performance can be carried out in a short period and at a low cost on a trial-and-error basis, which is very effective for rapid prototyping of RF SoCs. Adjustment of the oscillation frequency of the voltage-controlled oscillator using this technique and the technique of modeling the above-CMOS metal pattern are also described in this paper.
AB - In the design of radio frequency (RF) circuits, modifying the characteristics of an inductor in efficient way is required to realize rapid prototyping of RF system-on-a-chip (SoC). We propose an above-complementary- metal-oxide-semiconductor (above-CMOS) metal pattern technique. In this technique, metal patterns are formed using a simple process on the passivation layer above the on-chip inductor. Since the metal pattern with different shapes has different effects, we can tune the characteristics of an on-chip inductor by forming various metal patterns in a chip-by-chip manner. This method can experimentally create various inductors from an identical on-chip inductor. Therefore, the optimization of inductor characteristics and related circuit performance can be carried out in a short period and at a low cost on a trial-and-error basis, which is very effective for rapid prototyping of RF SoCs. Adjustment of the oscillation frequency of the voltage-controlled oscillator using this technique and the technique of modeling the above-CMOS metal pattern are also described in this paper.
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U2 - 10.1143/JJAP.50.04DB04
DO - 10.1143/JJAP.50.04DB04
M3 - Article
AN - SCOPUS:79955439139
SN - 0021-4922
VL - 50
JO - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes
JF - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes
IS - 4 PART 2
M1 - 04DB04
ER -