TY - JOUR
T1 - Achieving 9ps unloaded ring oscillator delay in FuSI/HfSiON with 0.8 nm EOT
AU - Rothschild, A.
AU - Shi, X.
AU - Everaert, J. L.
AU - Kerner, C.
AU - Chiarella, T.
AU - Hoffmann, T.
AU - Vrancken, C.
AU - Shickova, A.
AU - Yoshinao, H.
AU - Mitsuhashi, R.
AU - Niwa, M.
AU - Lauwers, A.
AU - Veloso, A.
AU - Kittl, J.
AU - Absil, P.
AU - Biesemans, S.
PY - 2007
Y1 - 2007
N2 - We achieved 635/250μA/μm@Ioff=20pA/μm unstrained FuSI/HfSiON nMOS/pMOS devices (Vdd=1.1V, Ioff=20pA/μm, Jg=20/8 mA/cm2) representing a 20%/2% device improvement enabling 10% power delay improvement compared to our previous report [1]. This was reached by a careful optimization of the nitrogen content into our HfSiON gate dielectric (to be 3-6%). Second, we demonstrate that the nitrogen content impacts not only the device performance but also the gate leakage current, the gate oxide integrity as well as PBTI and NBTI. We also report for the first time a 0.8 nm EOT HfSiON dielectric with Ni-FuSI gate and its impact on ring oscillator delay resulting in 9ps delays. This is an absolute record for any CMOS with metal gate to date.
AB - We achieved 635/250μA/μm@Ioff=20pA/μm unstrained FuSI/HfSiON nMOS/pMOS devices (Vdd=1.1V, Ioff=20pA/μm, Jg=20/8 mA/cm2) representing a 20%/2% device improvement enabling 10% power delay improvement compared to our previous report [1]. This was reached by a careful optimization of the nitrogen content into our HfSiON gate dielectric (to be 3-6%). Second, we demonstrate that the nitrogen content impacts not only the device performance but also the gate leakage current, the gate oxide integrity as well as PBTI and NBTI. We also report for the first time a 0.8 nm EOT HfSiON dielectric with Ni-FuSI gate and its impact on ring oscillator delay resulting in 9ps delays. This is an absolute record for any CMOS with metal gate to date.
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U2 - 10.1109/VLSIT.2007.4339691
DO - 10.1109/VLSIT.2007.4339691
M3 - Conference article
AN - SCOPUS:47249128522
SN - 0743-1562
SP - 198
EP - 199
JO - Digest of Technical Papers - Symposium on VLSI Technology
JF - Digest of Technical Papers - Symposium on VLSI Technology
M1 - 4339691
T2 - 2007 Symposium on VLSI Technology, VLSIT 2007
Y2 - 12 June 2007 through 14 June 2007
ER -