Advantages of nano-grating substrates in CMOS -FET characteristics

The drivability enhancement of CMOSFET of both n-type and p-type was achieved by using nano-grating silicon substrate without any complex fabrication process. The transconductances of both nMOSFET and pMOSFET on nano-grating substrates were increased thanks to the increase in effective channel width, leading to the area advantage of about 64% normalized by that of a conventional substrate. The channels were formed on horizontal (100) and vertical (110) surfaces of the nano-grating. Due to the existence of the current flowing in 〈110〉 direction on (110) surface, the effective carrier mobility in nano-grating nMOSFET was lower, while that in nano-grating pMOSFET was larger than the conventional one. So the difference of drivability enhancement between nMOSFET and pMOSFET became slighter, from which the area balance of CMOS circuit fabricated on the nano-grating substrates were improved.