An Efficient Reference Image Sharing Method for the Parallel Video Encoding Architecture

Ken Nakamura; Yuya Omori; Daisuke Kobayashi; Koyo Nitta; Kimikazu Sano; Masayuki Sato; Hiroe Iwasaki; Hiroaki Kobayashi

doi:10.1109/COOLCHIPS54332.2022.9772670

An Efficient Reference Image Sharing Method for the Parallel Video Encoding Architecture

Ken Nakamura, Yuya Omori, Daisuke Kobayashi, Koyo Nitta, Kimikazu Sano, Masayuki Sato, Hiroe Iwasaki, Hiroaki Kobayashi

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Video coding hardware is essential for various video applications, and to meet demands for higher resolution, the parallel video encoding architecture is often adopted, in which reference images are shared among encoder modules to maintain coding efficiency. However, conventional sharing methods are not always efficient in utilization of transferred image data. In this paper, we propose a method to reduce the amount of data transfer efficiently by using both pre-transfer and on-demand transfer. Experimental results show that the data transfer can be reduced to 19.8-35.3% of the conventional method on average although the access error rate increases to 0.5-2%. This makes it possible to reduce the required bandwidth of the inter-chip interface by saving the amount of data transfer.

Original language	English
Title of host publication	25th IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL Chips 2022 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781665419895
DOIs	https://doi.org/10.1109/COOLCHIPS54332.2022.9772670
Publication status	Published - 2022
Event	25th IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL Chips 2022 - Tokyo, Japan Duration: 2022 Apr 20 → 2022 Apr 22

Publication series

Name	25th IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL Chips 2022 - Proceedings

Conference

Conference	25th IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL Chips 2022
Country/Territory	Japan
City	Tokyo
Period	22/4/20 → 22/4/22

Keywords

cache memory
gem5
HEVC
multi-chip
video coding

ASJC Scopus subject areas

Hardware and Architecture
Energy Engineering and Power Technology
Electrical and Electronic Engineering
Artificial Intelligence
Computer Networks and Communications

Access to Document

10.1109/COOLCHIPS54332.2022.9772670

Cite this

Nakamura, K., Omori, Y., Kobayashi, D., Nitta, K., Sano, K., Sato, M., Iwasaki, H., & Kobayashi, H. (2022). An Efficient Reference Image Sharing Method for the Parallel Video Encoding Architecture. In 25th IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL Chips 2022 - Proceedings (25th IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL Chips 2022 - Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/COOLCHIPS54332.2022.9772670

An Efficient Reference Image Sharing Method for the Parallel Video Encoding Architecture. / Nakamura, Ken; Omori, Yuya; Kobayashi, Daisuke et al.
25th IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL Chips 2022 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2022. (25th IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL Chips 2022 - Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Nakamura, K, Omori, Y, Kobayashi, D, Nitta, K, Sano, K, Sato, M, Iwasaki, H & Kobayashi, H 2022, An Efficient Reference Image Sharing Method for the Parallel Video Encoding Architecture. in 25th IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL Chips 2022 - Proceedings. 25th IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL Chips 2022 - Proceedings, Institute of Electrical and Electronics Engineers Inc., 25th IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL Chips 2022, Tokyo, Japan, 22/4/20. https://doi.org/10.1109/COOLCHIPS54332.2022.9772670

Nakamura K, Omori Y, Kobayashi D, Nitta K, Sano K, Sato M et al. An Efficient Reference Image Sharing Method for the Parallel Video Encoding Architecture. In 25th IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL Chips 2022 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2022. (25th IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL Chips 2022 - Proceedings). doi: 10.1109/COOLCHIPS54332.2022.9772670

Nakamura, Ken ; Omori, Yuya ; Kobayashi, Daisuke et al. / An Efficient Reference Image Sharing Method for the Parallel Video Encoding Architecture. 25th IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL Chips 2022 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2022. (25th IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL Chips 2022 - Proceedings).

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abstract = "Video coding hardware is essential for various video applications, and to meet demands for higher resolution, the parallel video encoding architecture is often adopted, in which reference images are shared among encoder modules to maintain coding efficiency. However, conventional sharing methods are not always efficient in utilization of transferred image data. In this paper, we propose a method to reduce the amount of data transfer efficiently by using both pre-transfer and on-demand transfer. Experimental results show that the data transfer can be reduced to 19.8-35.3% of the conventional method on average although the access error rate increases to 0.5-2%. This makes it possible to reduce the required bandwidth of the inter-chip interface by saving the amount of data transfer.",

keywords = "cache memory, gem5, HEVC, multi-chip, video coding",

author = "Ken Nakamura and Yuya Omori and Daisuke Kobayashi and Koyo Nitta and Kimikazu Sano and Masayuki Sato and Hiroe Iwasaki and Hiroaki Kobayashi",

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AU - Omori, Yuya

AU - Kobayashi, Daisuke

AU - Nitta, Koyo

AU - Sano, Kimikazu

AU - Sato, Masayuki

AU - Iwasaki, Hiroe

AU - Kobayashi, Hiroaki

PY - 2022

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AB - Video coding hardware is essential for various video applications, and to meet demands for higher resolution, the parallel video encoding architecture is often adopted, in which reference images are shared among encoder modules to maintain coding efficiency. However, conventional sharing methods are not always efficient in utilization of transferred image data. In this paper, we propose a method to reduce the amount of data transfer efficiently by using both pre-transfer and on-demand transfer. Experimental results show that the data transfer can be reduced to 19.8-35.3% of the conventional method on average although the access error rate increases to 0.5-2%. This makes it possible to reduce the required bandwidth of the inter-chip interface by saving the amount of data transfer.

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An Efficient Reference Image Sharing Method for the Parallel Video Encoding Architecture

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