An energy-efficient dynamic memory address mapping mechanism

Masayuki Sato; Chengguang Han; Kazuhiko Komatsu; Ryusuke Egawa; Hiroyuki Takizawa; Hiroaki Kobayashi

doi:10.1109/CoolChips.2015.7158660

An energy-efficient dynamic memory address mapping mechanism

Masayuki Sato, Chengguang Han, Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

DRAM-based main memories are energy-hungry components of modern computer systems. Since accesses to DRAM need a complex protocol, the performance of an address-mapping scheme that decides physical locations of data based on physical addresses has a big impact on energy consumption. To improve the energy efficiency, this paper proposes a mechanism that dynamically selects an appropriate address-mapping scheme under the consideration of a trade-off between performance and power consumption. The mechanism works so as to reduce the energy consumption of the main memory. The evaluation results show that the proposed mechanism can reduce the energy consumption in comparison with conventional address-mapping schemes, which do not change their address mappings.

Original language	English
Title of host publication	IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVIII - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781467373258
DOIs	https://doi.org/10.1109/CoolChips.2015.7158660
Publication status	Published - 2015 Jul 14
Event	18th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2015 - Yokohama, Japan Duration: 2015 Apr 13 → 2015 Apr 15

Publication series

Name	IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVIII - Proceedings

Other

Other	18th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2015
Country/Territory	Japan
City	Yokohama
Period	15/4/13 → 15/4/15

Keywords

DRAM
address mapping
energy consumption
rank

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

Access to Document

10.1109/CoolChips.2015.7158660

Cite this

Sato, M., Han, C., Komatsu, K., Egawa, R., Takizawa, H., & Kobayashi, H. (2015). An energy-efficient dynamic memory address mapping mechanism. In IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVIII - Proceedings [7158660] (IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVIII - Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/CoolChips.2015.7158660

An energy-efficient dynamic memory address mapping mechanism. / Sato, Masayuki; Han, Chengguang; Komatsu, Kazuhiko et al.
IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVIII - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2015. 7158660 (IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVIII - Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Sato, M, Han, C, Komatsu, K, Egawa, R, Takizawa, H & Kobayashi, H 2015, An energy-efficient dynamic memory address mapping mechanism. in IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVIII - Proceedings., 7158660, IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVIII - Proceedings, Institute of Electrical and Electronics Engineers Inc., 18th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2015, Yokohama, Japan, 15/4/13. https://doi.org/10.1109/CoolChips.2015.7158660

Sato M, Han C, Komatsu K, Egawa R, Takizawa H , Kobayashi H. An energy-efficient dynamic memory address mapping mechanism. In IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVIII - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2015. 7158660. (IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVIII - Proceedings). doi: 10.1109/CoolChips.2015.7158660

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AB - DRAM-based main memories are energy-hungry components of modern computer systems. Since accesses to DRAM need a complex protocol, the performance of an address-mapping scheme that decides physical locations of data based on physical addresses has a big impact on energy consumption. To improve the energy efficiency, this paper proposes a mechanism that dynamically selects an appropriate address-mapping scheme under the consideration of a trade-off between performance and power consumption. The mechanism works so as to reduce the energy consumption of the main memory. The evaluation results show that the proposed mechanism can reduce the energy consumption in comparison with conventional address-mapping schemes, which do not change their address mappings.

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An energy-efficient dynamic memory address mapping mechanism

Abstract

Publication series

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Keywords

ASJC Scopus subject areas

UN SDGs

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