An experimental study of TiN gate FinFET SRAM with (111)-oriented sidewall channels

Y. X. Liu; T. Hayashida; T. Matsukawa; K. Endo; S. O'uchi; K. Sakamoto; M. Masahara; K. Ishii; J. Tsukada; Y. Ishikawa; H. Yamauchi; A. Ogura; E. Suzuki

doi:10.1109/SNW.2008.5418473

An experimental study of TiN gate FinFET SRAM with (111)-oriented sidewall channels

Y. X. Liu, T. Hayashida, T. Matsukawa, K. Endo, S. O'uchi, K. Sakamoto, M. Masahara, K. Ishii, J. Tsukada, Y. Ishikawa, H. Yamauchi, A. Ogura, E. Suzuki

IFS - Global Collaborative Research and Education Center for Integrated Flow Science (IFS-GCORE)

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Citations (Scopus)

Abstract

TiN gate FinFET SRAM half-cells with different β-ratios from 1-3 have successfully been fabricated by using the orientation dependent wet etching and conventional reactive sputtering, for the first time. It is experimentally found that static noise margin (SNM) at read condition increases with increasing β-ratio due to the strength of pull-down transistor. To overcome SRAM cell size increment with increasing β, a fin-height controlled pass-gate (PG) SRAM structure is proposed.

Original language	English
Title of host publication	IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008
DOIs	https://doi.org/10.1109/SNW.2008.5418473
Publication status	Published - 2008
Event	IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008 - Honolulu, HI, United States Duration: 2008 Jun 15 → 2008 Jun 16

Publication series

Name	IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008

Conference

Conference	IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008
Country/Territory	United States
City	Honolulu, HI
Period	08/6/15 → 08/6/16

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10.1109/SNW.2008.5418473

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Liu, Y. X., Hayashida, T., Matsukawa, T., Endo, K., O'uchi, S., Sakamoto, K., Masahara, M., Ishii, K., Tsukada, J., Ishikawa, Y., Yamauchi, H., Ogura, A., & Suzuki, E. (2008). An experimental study of TiN gate FinFET SRAM with (111)-oriented sidewall channels. In IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008 Article 5418473 (IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008). https://doi.org/10.1109/SNW.2008.5418473

@inproceedings{03feba989ee6493ca7b39fe67a441d54,

title = "An experimental study of TiN gate FinFET SRAM with (111)-oriented sidewall channels",

abstract = "TiN gate FinFET SRAM half-cells with different β-ratios from 1-3 have successfully been fabricated by using the orientation dependent wet etching and conventional reactive sputtering, for the first time. It is experimentally found that static noise margin (SNM) at read condition increases with increasing β-ratio due to the strength of pull-down transistor. To overcome SRAM cell size increment with increasing β, a fin-height controlled pass-gate (PG) SRAM structure is proposed.",

author = "Liu, {Y. X.} and T. Hayashida and T. Matsukawa and K. Endo and S. O'uchi and K. Sakamoto and M. Masahara and K. Ishii and J. Tsukada and Y. Ishikawa and H. Yamauchi and A. Ogura and E. Suzuki",

year = "2008",

doi = "10.1109/SNW.2008.5418473",

language = "English",

isbn = "9781424420711",

series = "IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008",

booktitle = "IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008",

note = "IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008 ; Conference date: 15-06-2008 Through 16-06-2008",

}

Liu, YX, Hayashida, T, Matsukawa, T, Endo, K, O'uchi, S, Sakamoto, K, Masahara, M, Ishii, K, Tsukada, J, Ishikawa, Y, Yamauchi, H, Ogura, A & Suzuki, E 2008, An experimental study of TiN gate FinFET SRAM with (111)-oriented sidewall channels. in IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008., 5418473, IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008, IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008, Honolulu, HI, United States, 08/6/15. https://doi.org/10.1109/SNW.2008.5418473

TY - GEN

T1 - An experimental study of TiN gate FinFET SRAM with (111)-oriented sidewall channels

AU - Liu, Y. X.

AU - Hayashida, T.

AU - Matsukawa, T.

AU - Endo, K.

AU - O'uchi, S.

AU - Sakamoto, K.

AU - Masahara, M.

AU - Ishii, K.

AU - Tsukada, J.

AU - Ishikawa, Y.

AU - Yamauchi, H.

AU - Ogura, A.

AU - Suzuki, E.

PY - 2008

Y1 - 2008

N2 - TiN gate FinFET SRAM half-cells with different β-ratios from 1-3 have successfully been fabricated by using the orientation dependent wet etching and conventional reactive sputtering, for the first time. It is experimentally found that static noise margin (SNM) at read condition increases with increasing β-ratio due to the strength of pull-down transistor. To overcome SRAM cell size increment with increasing β, a fin-height controlled pass-gate (PG) SRAM structure is proposed.

AB - TiN gate FinFET SRAM half-cells with different β-ratios from 1-3 have successfully been fabricated by using the orientation dependent wet etching and conventional reactive sputtering, for the first time. It is experimentally found that static noise margin (SNM) at read condition increases with increasing β-ratio due to the strength of pull-down transistor. To overcome SRAM cell size increment with increasing β, a fin-height controlled pass-gate (PG) SRAM structure is proposed.

UR - http://www.scopus.com/inward/record.url?scp=77949928789&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=77949928789&partnerID=8YFLogxK

U2 - 10.1109/SNW.2008.5418473

DO - 10.1109/SNW.2008.5418473

M3 - Conference contribution

AN - SCOPUS:77949928789

SN - 9781424420711

T3 - IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008

BT - IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008

T2 - IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008

Y2 - 15 June 2008 through 16 June 2008

ER -

An experimental study of TiN gate FinFET SRAM with (111)-oriented sidewall channels

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