An on-chip 96.5% current efficiency CMOS linear regulator

K. Sunaga; T. Endoh; H. Sakuraba; F. Masuoka

doi:10.1109/ASPDAC.2001.913322

An on-chip 96.5% current efficiency CMOS linear regulator

K. Sunaga, T. Endoh, H. Sakuraba, F. Masuoka

ENG - Electrical Engineering

Tohoku University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Citation (Scopus)

Abstract

A proposed linear regulator uses a flexible control technique of output current (FCOC) to achieve 96.5% efficiency. The FCOC technique drives a flexible output current according to the output current variation and stable output voltage supply. The linear regulator fabricated by 1.2 μm CMOS process occupies 0.423 mm². The fabricated linear regulator achieves 96.5% current efficiency and less than 6.81 mVpp output voltage fluctuation at an output current frequency from 1.8 Hz to 100 MHz.

Original language	English
Title of host publication	Proceedings of the ASP-DAC 2001
Subtitle of host publication	Asia and South Pacific Design Automation Conference 2001
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	297-301
Number of pages	5
ISBN (Electronic)	0780366336
DOIs	https://doi.org/10.1109/ASPDAC.2001.913322
Publication status	Published - 2001
Event	Asia and South Pacific Design Automation Conference 2001, ASP-DAC 2001 - Yokohama, Japan Duration: 2001 Jan 30 → 2001 Feb 2

Publication series

Name	Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Volume	2001-January

Conference

Conference	Asia and South Pacific Design Automation Conference 2001, ASP-DAC 2001
Country/Territory	Japan
City	Yokohama
Period	01/1/30 → 01/2/2

Keywords

Circuit simulation
CMOS technology
Communication system control
Driver circuits
Mirrors
Pulse width modulation
Pulse width modulation converters
Regulators
SPICE
Voltage

Access to Document

10.1109/ASPDAC.2001.913322

Cite this

Sunaga, K., Endoh, T., Sakuraba, H., & Masuoka, F. (2001). An on-chip 96.5% current efficiency CMOS linear regulator. In Proceedings of the ASP-DAC 2001: Asia and South Pacific Design Automation Conference 2001 (pp. 297-301). Article 913322 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; Vol. 2001-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ASPDAC.2001.913322

@inproceedings{13e5775ba23048908a3ba6b6c35329c4,

title = "An on-chip 96.5% current efficiency CMOS linear regulator",

abstract = "A proposed linear regulator uses a flexible control technique of output current (FCOC) to achieve 96.5% efficiency. The FCOC technique drives a flexible output current according to the output current variation and stable output voltage supply. The linear regulator fabricated by 1.2 μm CMOS process occupies 0.423 mm2. The fabricated linear regulator achieves 96.5% current efficiency and less than 6.81 mVpp output voltage fluctuation at an output current frequency from 1.8 Hz to 100 MHz.",

keywords = "Circuit simulation, CMOS technology, Communication system control, Driver circuits, Mirrors, Pulse width modulation, Pulse width modulation converters, Regulators, SPICE, Voltage",

author = "K. Sunaga and T. Endoh and H. Sakuraba and F. Masuoka",

note = "Publisher Copyright: {\textcopyright} 2001 IEEE.; Asia and South Pacific Design Automation Conference 2001, ASP-DAC 2001 ; Conference date: 30-01-2001 Through 02-02-2001",

year = "2001",

doi = "10.1109/ASPDAC.2001.913322",

language = "English",

series = "Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "297--301",

booktitle = "Proceedings of the ASP-DAC 2001",

address = "United States",

}

Sunaga, K, Endoh, T, Sakuraba, H & Masuoka, F 2001, An on-chip 96.5% current efficiency CMOS linear regulator. in Proceedings of the ASP-DAC 2001: Asia and South Pacific Design Automation Conference 2001., 913322, Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, vol. 2001-January, Institute of Electrical and Electronics Engineers Inc., pp. 297-301, Asia and South Pacific Design Automation Conference 2001, ASP-DAC 2001, Yokohama, Japan, 01/1/30. https://doi.org/10.1109/ASPDAC.2001.913322

An on-chip 96.5% current efficiency CMOS linear regulator. / Sunaga, K.; Endoh, T.; Sakuraba, H. et al.
Proceedings of the ASP-DAC 2001: Asia and South Pacific Design Automation Conference 2001. Institute of Electrical and Electronics Engineers Inc., 2001. p. 297-301 913322 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; Vol. 2001-January).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - An on-chip 96.5% current efficiency CMOS linear regulator

AU - Sunaga, K.

AU - Endoh, T.

AU - Sakuraba, H.

AU - Masuoka, F.

PY - 2001

Y1 - 2001

N2 - A proposed linear regulator uses a flexible control technique of output current (FCOC) to achieve 96.5% efficiency. The FCOC technique drives a flexible output current according to the output current variation and stable output voltage supply. The linear regulator fabricated by 1.2 μm CMOS process occupies 0.423 mm2. The fabricated linear regulator achieves 96.5% current efficiency and less than 6.81 mVpp output voltage fluctuation at an output current frequency from 1.8 Hz to 100 MHz.

AB - A proposed linear regulator uses a flexible control technique of output current (FCOC) to achieve 96.5% efficiency. The FCOC technique drives a flexible output current according to the output current variation and stable output voltage supply. The linear regulator fabricated by 1.2 μm CMOS process occupies 0.423 mm2. The fabricated linear regulator achieves 96.5% current efficiency and less than 6.81 mVpp output voltage fluctuation at an output current frequency from 1.8 Hz to 100 MHz.

KW - Circuit simulation

KW - CMOS technology

KW - Communication system control

KW - Driver circuits

KW - Mirrors

KW - Pulse width modulation

KW - Pulse width modulation converters

KW - Regulators

KW - SPICE

KW - Voltage

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U2 - 10.1109/ASPDAC.2001.913322

DO - 10.1109/ASPDAC.2001.913322

M3 - Conference contribution

AN - SCOPUS:29044450968

T3 - Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

SP - 297

EP - 301

BT - Proceedings of the ASP-DAC 2001

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - Asia and South Pacific Design Automation Conference 2001, ASP-DAC 2001

Y2 - 30 January 2001 through 2 February 2001

ER -

Sunaga K, Endoh T, Sakuraba H, Masuoka F. An on-chip 96.5% current efficiency CMOS linear regulator. In Proceedings of the ASP-DAC 2001: Asia and South Pacific Design Automation Conference 2001. Institute of Electrical and Electronics Engineers Inc. 2001. p. 297-301. 913322. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). doi: 10.1109/ASPDAC.2001.913322

An on-chip 96.5% current efficiency CMOS linear regulator

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