TY - GEN
T1 - Arithmetic module generator with algorithm optimization capability
AU - Watanabe, Yuki
AU - Homma, Naofumi
AU - Aoki, Takafumi
AU - Higuchi, Tatsuo
PY - 2008/9/19
Y1 - 2008/9/19
N2 - This paper presents an arithmetic module generator based on an arithmetic description language called ARITH. The use of ARITH makes it possible to describe a wide variety of arithmetic algorithms in a unified manner. The ARITH descriptions are formally verified in the generator even if the arithmetic algorithms include unconventional number systems for operands or internal variables. The proposed generator also optimizes arithmetic algorithms by using performance profiles derived from the previous generation. From these features, we can obtain high-performance arithmetic modules whose functions are completely verified at the algorithm level. In this paper, we demonstrate that the optimal prefix adders improved the performance of generated arithmetic modules such as multipliers in comparison with the standard prefix adders.
AB - This paper presents an arithmetic module generator based on an arithmetic description language called ARITH. The use of ARITH makes it possible to describe a wide variety of arithmetic algorithms in a unified manner. The ARITH descriptions are formally verified in the generator even if the arithmetic algorithms include unconventional number systems for operands or internal variables. The proposed generator also optimizes arithmetic algorithms by using performance profiles derived from the previous generation. From these features, we can obtain high-performance arithmetic modules whose functions are completely verified at the algorithm level. In this paper, we demonstrate that the optimal prefix adders improved the performance of generated arithmetic modules such as multipliers in comparison with the standard prefix adders.
UR - http://www.scopus.com/inward/record.url?scp=51749109338&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=51749109338&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2008.4541788
DO - 10.1109/ISCAS.2008.4541788
M3 - Conference contribution
AN - SCOPUS:51749109338
SN - 9781424416844
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 1796
EP - 1799
BT - 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
T2 - 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Y2 - 18 May 2008 through 21 May 2008
ER -