Asynchronous multiple-valued VLSI system based on dual-rail current-mode differential logic

Takahiro Hanyu, Takahiro Saito, Michitaka Kameyama

Research output: Contribution to journalConference articlepeer-review

3 Citations (Scopus)


This paper presents a new asynchronous data-transfer scheme in a multiple-valued current-mode VLSI circuit based on dual-rail differential logic. In the proposed 2-phase multiple-valued asynchronous communication scheme, R-valued dual-rail complementary signals are used to represent a `data value,' while the `spacer' is represented as (0, 0). The sum of R-valued dual-rail complementary values is a constant (R-1), which makes it easy to distinguish a data-arrival state from a data-transition state. This scheme can be extended to any multiple-valued data representation in asynchronous communication. New basic components, a signal-state detector to detect a data-arrival state, and a current-controlled threshold detector to produce dual-rail spacer signals (0, 0), are also proposed to realize a compact asynchronous control circuit. It is demonstrated that the overhead for the proposed asynchronous circuit is very small compared with conventional synchronous multiple-valued current-mode logic approach.

Original languageEnglish
Pages (from-to)134-139
Number of pages6
JournalProceedings of The International Symposium on Multiple-Valued Logic
Publication statusPublished - 1998
EventProceedings of the 1998 28th International Symposium on Multiple-Valued Logic - Fukuoka, Jpn
Duration: 1998 May 271998 May 29


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