Asynchronous pulse neural network model and its analog IC implementation

Yoshihiko Horio; Hidekazu Yasuda; Mitsuru Hanagata; Kazuyuki Aihara

Asynchronous pulse neural network model and its analog IC implementation

Yoshihiko Horio, Hidekazu Yasuda, Mitsuru Hanagata, Kazuyuki Aihara

RIEC - Human and Bio Information Systems Division

Tokyo Denki University

Research output: Contribution to conference › Paper › peer-review

2 Citations (Scopus)

Abstract

Prototype neuron and axon circuits for the asynchronous pulse neural network model are fabricated with 1.2 μm CMOS technology and tested. The neuron circuit can function as both of a coincidence detector and an integrator. These opposite neuronal functions can be controlled by changing the internal time constants through the external voltages. The axon circuit, which mimics axonal, dendritic and synaptic delays, realizes pulse delay. The delay time can be continuously controlled by the external voltage.

Original language	English
Pages	301-304
Number of pages	4
Publication status	Published - 1998
Event	Proceedings of the 1998 5th IEEE International Conference on Electronics, Circuits and Systems (ICECS'98) - Surfing the Waves of Science and Technology - Lisboa, Portugal Duration: 1998 Sept 7 → 1998 Sept 10

Conference

Conference	Proceedings of the 1998 5th IEEE International Conference on Electronics, Circuits and Systems (ICECS'98) - Surfing the Waves of Science and Technology
City	Lisboa, Portugal
Period	98/9/7 → 98/9/10

Cite this

@conference{88587424850c4b47b92cdd3a33f15233,

title = "Asynchronous pulse neural network model and its analog IC implementation",

abstract = "Prototype neuron and axon circuits for the asynchronous pulse neural network model are fabricated with 1.2 μm CMOS technology and tested. The neuron circuit can function as both of a coincidence detector and an integrator. These opposite neuronal functions can be controlled by changing the internal time constants through the external voltages. The axon circuit, which mimics axonal, dendritic and synaptic delays, realizes pulse delay. The delay time can be continuously controlled by the external voltage.",

author = "Yoshihiko Horio and Hidekazu Yasuda and Mitsuru Hanagata and Kazuyuki Aihara",

year = "1998",

language = "English",

pages = "301--304",

note = "Proceedings of the 1998 5th IEEE International Conference on Electronics, Circuits and Systems (ICECS'98) - Surfing the Waves of Science and Technology ; Conference date: 07-09-1998 Through 10-09-1998",

}

Asynchronous pulse neural network model and its analog IC implementation. / Horio, Yoshihiko; Yasuda, Hidekazu; Hanagata, Mitsuru et al.
1998. 301-304 Paper presented at Proceedings of the 1998 5th IEEE International Conference on Electronics, Circuits and Systems (ICECS'98) - Surfing the Waves of Science and Technology, Lisboa, Portugal.

Research output: Contribution to conference › Paper › peer-review

TY - CONF

T1 - Asynchronous pulse neural network model and its analog IC implementation

AU - Horio, Yoshihiko

AU - Yasuda, Hidekazu

AU - Hanagata, Mitsuru

AU - Aihara, Kazuyuki

PY - 1998

Y1 - 1998

N2 - Prototype neuron and axon circuits for the asynchronous pulse neural network model are fabricated with 1.2 μm CMOS technology and tested. The neuron circuit can function as both of a coincidence detector and an integrator. These opposite neuronal functions can be controlled by changing the internal time constants through the external voltages. The axon circuit, which mimics axonal, dendritic and synaptic delays, realizes pulse delay. The delay time can be continuously controlled by the external voltage.

AB - Prototype neuron and axon circuits for the asynchronous pulse neural network model are fabricated with 1.2 μm CMOS technology and tested. The neuron circuit can function as both of a coincidence detector and an integrator. These opposite neuronal functions can be controlled by changing the internal time constants through the external voltages. The axon circuit, which mimics axonal, dendritic and synaptic delays, realizes pulse delay. The delay time can be continuously controlled by the external voltage.

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M3 - Paper

AN - SCOPUS:0032264010

SP - 301

EP - 304

T2 - Proceedings of the 1998 5th IEEE International Conference on Electronics, Circuits and Systems (ICECS'98) - Surfing the Waves of Science and Technology

Y2 - 7 September 1998 through 10 September 1998

ER -

Asynchronous pulse neural network model and its analog IC implementation

Abstract

Conference

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