TY - GEN
T1 - Atomic layer deposition of 25-nm-thin sidewall spacer for enhancement of FinFET performance
AU - Endo, Kazuhiko
AU - Ishikawa, Yuki
AU - Matsukawa, Takashi
AU - Liu, Yongxum
AU - O'uchi, Shin Ichi
AU - Sakamoto, Kunihiro
AU - Tsukada, Junichi
AU - Yamauchi, Hiromi
AU - Masahara, Meishoku
PY - 2011
Y1 - 2011
N2 - We have successfully fabricated FinFETs with a 25-nm-short extension of the source/drain by using atomic layer deposition of SiO2 thin films for the side-wall spacer of the gate electrode. The performance of the FinFET has been successfully improved by the reduction of the parasitic resistance.
AB - We have successfully fabricated FinFETs with a 25-nm-short extension of the source/drain by using atomic layer deposition of SiO2 thin films for the side-wall spacer of the gate electrode. The performance of the FinFET has been successfully improved by the reduction of the parasitic resistance.
UR - http://www.scopus.com/inward/record.url?scp=82955188010&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=82955188010&partnerID=8YFLogxK
U2 - 10.1109/ESSDERC.2011.6044229
DO - 10.1109/ESSDERC.2011.6044229
M3 - Conference contribution
AN - SCOPUS:82955188010
SN - 9781457707056
T3 - European Solid-State Device Research Conference
SP - 83
EP - 86
BT - ESSDERC 2011 - Proceedings of the 41st European Solid-State Device Research Conference
T2 - 41st European Solid-State Device Research Conference, ESSDERC 2011
Y2 - 12 September 2011 through 16 September 2011
ER -