Capacitance-voltage measurement method for ultrathin gate dielectrics using LC resonance circuit

Akinobu Teramoto, Rihito Kuroda, Masanori Komura, Kazufumi Watanabe, Shigetoshi Sugawa, Tadahiro Ohmi

Research output: Contribution to journalArticlepeer-review

6 Citations (Scopus)


The capacitance-voltage (C-V) measurement method using the LC resonance circuit (LC resonance method) for ultrathin gate dielectrics having large leakage current is demonstrated. In the LC resonance method, only an external inductance and a resistance and a simple equivalent electrical circuit of MOS devices are employed. External inductance can be optimized using the equivalent quality factor. At each gate voltage bias point, parameters of MOS equivalent circuit are determined by fitting the calculation results to the measured impedance-frequency characteristics at the resonance frequency point. Total resistance value of MOS equivalent circuit that is determined from the dc gate current-gate voltage characteristics can be a good help in the fitting sequence. The rms error of calculated and measured impedance-frequency characteristics is used for the fitting verification. The sensitivity of rms error to the variation in MOS capacitance value is discussed to determine the accuracy of the LC resonance method. C-V measurements of both thick (EOT = 7.0 nm) and thin (EOT = 1.2 nm) gate dielectrics are demonstrated and the electrical oxide thickness (EOT) values are extracted from the C-V characteristics. Comparison between the LC resonance method and the other C-V measurement methods is also made with respect to C-V measurement results to show the good applicability of the LC resonance method.

Original languageEnglish
Pages (from-to)43-49
Number of pages7
JournalIEEE Transactions on Semiconductor Manufacturing
Issue number1
Publication statusPublished - 2006 Feb


  • Capacitance
  • Mos devices
  • Resonance, thickness measurement


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