Complementary ferroelectric-capacitor logic for low-power logic-in-memory VLSI

Hiromitsu Kimura, Takahiro Hanyu, Michitaka Kameyama, Yoshikazu Fujimori, Takashi Nakamura, Hidemi Takasu

Research output: Contribution to journalConference articlepeer-review

9 Citations (Scopus)


Series connection of two ferroelectric capacitors with complementary stored data allows both switching operations and non-destructive storage. This circuitry, used in a fully parallel 32b CAM, results in a dynamic power reduction by 2/3 and static power reduction by 1/9000 compared to a CMOS implementation using 0.6μm ferroelectric CMOS.

Original languageEnglish
Pages (from-to)157+160-161+485
JournalDigest of Technical Papers - IEEE International Solid-State Circuits Conference
Publication statusPublished - 2003
Event2003 Digest of Technical Papers - , United States
Duration: 2003 Feb 92003 Feb 13


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