TY - JOUR
T1 - Design and evaluation of a current-mode multiple-valued PLA based on resonant tunnelling transistor model
AU - Deng, X.
AU - Hanyu, T.
AU - Kameyama, M.
PY - 1994/12
Y1 - 1994/12
N2 - The investigation of the device functions required from the systems point of view is important to the development of the next generation of actual devices. In this paper, a resonant tunnelling transistor (RTT) model is defined. The current-voltage characteristic of the model can have multiple peaks, and the widths of each peak and valley can be set to any value. A multiple-valued universal literal (MVUL) circuit using the RTT model is presented as a basic building block in a multiple-valued programmable logic array (MVPLA). An MVPLA structure based on MVUL, AND, MIN, and linear sum operators is proposed for the implementation of multiple-valued systems. Since the MVUL circuit is designed using only one transistor, and the other basic building blocks are implemented by simple current-mode circuits, the proposed MVPLA becomes very compact. The layouts and SPICE simulations show that the proposed MVPLA is superior to other types of PLA in terms of size, delay and dynamic power dissipation if the RTT model is realized by an actual device.
AB - The investigation of the device functions required from the systems point of view is important to the development of the next generation of actual devices. In this paper, a resonant tunnelling transistor (RTT) model is defined. The current-voltage characteristic of the model can have multiple peaks, and the widths of each peak and valley can be set to any value. A multiple-valued universal literal (MVUL) circuit using the RTT model is presented as a basic building block in a multiple-valued programmable logic array (MVPLA). An MVPLA structure based on MVUL, AND, MIN, and linear sum operators is proposed for the implementation of multiple-valued systems. Since the MVUL circuit is designed using only one transistor, and the other basic building blocks are implemented by simple current-mode circuits, the proposed MVPLA becomes very compact. The layouts and SPICE simulations show that the proposed MVPLA is superior to other types of PLA in terms of size, delay and dynamic power dissipation if the RTT model is realized by an actual device.
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U2 - 10.1049/ip-cds:19941389
DO - 10.1049/ip-cds:19941389
M3 - Article
AN - SCOPUS:0028720635
SN - 1350-2409
VL - 141
SP - 445
EP - 450
JO - IEE Proceedings: Circuits, Devices and Systems
JF - IEE Proceedings: Circuits, Devices and Systems
IS - 6
ER -