Design and evaluation of a differential switching gate for low-voltage applications

Masanori Natsui; Kiyohiro Kashiuchi; Takahiro Hanyu

doi:10.1109/ISMVL.2013.23

Design and evaluation of a differential switching gate for low-voltage applications

Masanori Natsui, Kiyohiro Kashiuchi, Takahiro Hanyu

RIEC - Computing System Platforms Division

Tohoku University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

A new basic switching gate based on differential logic is proposed for implementing high-performance low-voltage VLSI. Differential switching gate operates in current domain and output voltage swing can be determined independent of supply voltage, which leads to a high frequency operation even if in a lower-supply-voltage condition. Moreover, the use of a modified pMOS load further improves the transient characteristic of the switching gate. Through an evaluation of a differential logic-based combinational circuit, a potential capability of the differential switching gate is demonstrated.

Original language	English
Title of host publication	Proceedings - 2013 IEEE 43rd International Symposium on Multiple-Valued Logic, ISMVL 2013
Pages	146-151
Number of pages	6
DOIs	https://doi.org/10.1109/ISMVL.2013.23
Publication status	Published - 2013
Event	2013 IEEE 43rd International Symposium on Multiple-Valued Logic, ISMVL 2013 - Toyama, Japan Duration: 2013 May 22 → 2013 May 24

Publication series

Name	Proceedings of The International Symposium on Multiple-Valued Logic
ISSN (Print)	0195-623X

Conference

Conference	2013 IEEE 43rd International Symposium on Multiple-Valued Logic, ISMVL 2013
Country/Territory	Japan
City	Toyama
Period	13/5/22 → 13/5/24

Keywords

bulk-drain connection
differential logic
low-voltage circuit
propagation delay

Access to Document

10.1109/ISMVL.2013.23

Cite this

@inproceedings{ee674e4224e04f1ca7af99a4e09a1b29,

title = "Design and evaluation of a differential switching gate for low-voltage applications",

abstract = "A new basic switching gate based on differential logic is proposed for implementing high-performance low-voltage VLSI. Differential switching gate operates in current domain and output voltage swing can be determined independent of supply voltage, which leads to a high frequency operation even if in a lower-supply-voltage condition. Moreover, the use of a modified pMOS load further improves the transient characteristic of the switching gate. Through an evaluation of a differential logic-based combinational circuit, a potential capability of the differential switching gate is demonstrated.",

keywords = "bulk-drain connection, differential logic, low-voltage circuit, propagation delay",

author = "Masanori Natsui and Kiyohiro Kashiuchi and Takahiro Hanyu",

year = "2013",

doi = "10.1109/ISMVL.2013.23",

language = "English",

isbn = "9780769549767",

series = "Proceedings of The International Symposium on Multiple-Valued Logic",

pages = "146--151",

booktitle = "Proceedings - 2013 IEEE 43rd International Symposium on Multiple-Valued Logic, ISMVL 2013",

note = "2013 IEEE 43rd International Symposium on Multiple-Valued Logic, ISMVL 2013 ; Conference date: 22-05-2013 Through 24-05-2013",

}

Natsui, M, Kashiuchi, K & Hanyu, T 2013, Design and evaluation of a differential switching gate for low-voltage applications. in Proceedings - 2013 IEEE 43rd International Symposium on Multiple-Valued Logic, ISMVL 2013., 6524654, Proceedings of The International Symposium on Multiple-Valued Logic, pp. 146-151, 2013 IEEE 43rd International Symposium on Multiple-Valued Logic, ISMVL 2013, Toyama, Japan, 13/5/22. https://doi.org/10.1109/ISMVL.2013.23

Design and evaluation of a differential switching gate for low-voltage applications. / Natsui, Masanori; Kashiuchi, Kiyohiro; Hanyu, Takahiro.
Proceedings - 2013 IEEE 43rd International Symposium on Multiple-Valued Logic, ISMVL 2013. 2013. p. 146-151 6524654 (Proceedings of The International Symposium on Multiple-Valued Logic).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Design and evaluation of a differential switching gate for low-voltage applications

AU - Natsui, Masanori

AU - Kashiuchi, Kiyohiro

AU - Hanyu, Takahiro

PY - 2013

Y1 - 2013

N2 - A new basic switching gate based on differential logic is proposed for implementing high-performance low-voltage VLSI. Differential switching gate operates in current domain and output voltage swing can be determined independent of supply voltage, which leads to a high frequency operation even if in a lower-supply-voltage condition. Moreover, the use of a modified pMOS load further improves the transient characteristic of the switching gate. Through an evaluation of a differential logic-based combinational circuit, a potential capability of the differential switching gate is demonstrated.

AB - A new basic switching gate based on differential logic is proposed for implementing high-performance low-voltage VLSI. Differential switching gate operates in current domain and output voltage swing can be determined independent of supply voltage, which leads to a high frequency operation even if in a lower-supply-voltage condition. Moreover, the use of a modified pMOS load further improves the transient characteristic of the switching gate. Through an evaluation of a differential logic-based combinational circuit, a potential capability of the differential switching gate is demonstrated.

KW - bulk-drain connection

KW - differential logic

KW - low-voltage circuit

KW - propagation delay

UR - http://www.scopus.com/inward/record.url?scp=84880716542&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84880716542&partnerID=8YFLogxK

U2 - 10.1109/ISMVL.2013.23

DO - 10.1109/ISMVL.2013.23

M3 - Conference contribution

AN - SCOPUS:84880716542

SN - 9780769549767

T3 - Proceedings of The International Symposium on Multiple-Valued Logic

SP - 146

EP - 151

BT - Proceedings - 2013 IEEE 43rd International Symposium on Multiple-Valued Logic, ISMVL 2013

T2 - 2013 IEEE 43rd International Symposium on Multiple-Valued Logic, ISMVL 2013

Y2 - 22 May 2013 through 24 May 2013

ER -

Design and evaluation of a differential switching gate for low-voltage applications

Abstract

Publication series

Conference

Keywords

Access to Document

Other files and links

Fingerprint

Cite this