Design methodologies for compact logic circuits based on collision-based computing

Kazuhito Yamada; Ikuko N. Motoike; Tetsuya Asai; Yoshihito Amemiya

doi:10.1587/elex.3.292

Design methodologies for compact logic circuits based on collision-based computing

Kazuhito Yamada, Ikuko N. Motoike, Tetsuya Asai, Yoshihito Amemiya

Tohoku Medical Megabank Organization (ToMMo)

Hokkaido University

Research output: Contribution to journal › Article › peer-review

1 Citation (Scopus)

Abstract

A method of designing compact multiple-input combinational logic circuits is proposed. We show that i) fundamental logic gates can be constructed by a small number of collision-based fusion gates, ii) multiple-input logic gates are constructed in a systematic manner, iii) the number of transistors in specific logic gates constructed by the proposed method is significantly smaller than that of conventional logic gates.

Original language	English
Pages (from-to)	292-298
Number of pages	7
Journal	IEICE Electronics Express
Volume	3
Issue number	13
DOIs	https://doi.org/10.1587/elex.3.292
Publication status	Published - 2006 Jul 10

Keywords

Collision-based computing
Fusion gate
Integrated circuits
Logic circuits

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10.1587/elex.3.292

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Design methodologies for compact logic circuits based on collision-based computing

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Keywords

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