A high-density, VLSI-oriented cellular associative memory for real-time numeric and nonnumeric computation is presented. Three kinds of basic search operations, which are parallel by word and serial by digit slice, are considered. A search word and memory words are encoded to several discrete values so that the number of digits to perform comparisons while searching can be greatly reduced. A multiple-valued down literal circuit of two variables, which is the basic building block for a compact content-addressable memory (CAM), can be implemented using a floating-gate MOS transistor whose threshold voltage is controllable by the external input signal. It is demonstrated that the number of transistors, cells, and interconnections between cells in an r-valued CAM are reduced to less than 1/log2r in comparison with the corresponding binary implementation.
|Number of pages||6|
|Journal||Proceedings of The International Symposium on Multiple-Valued Logic|
|Publication status||Published - 1990|
|Event||Proceedings of the 20th International Symposium on Multiple-Valued Logic - Charlotte, NC, USA|
Duration: 1990 May 23 → 1990 May 25