TY - GEN
T1 - Design of wave-parallel computing circuits for densely connected architectures
AU - Yuminaka, Yasushi
AU - Aoki, Takafumi
AU - Higuchi, Tatsuo
PY - 1994/1/1
Y1 - 1994/1/1
N2 - This paper investigates new architecture LSIs based on wave-parallel computing(WPC) to address the interconnection problems in highly parallel VLSI systems. The underlying concept is frequency multiplexing of digital signals, which enables us to utilize the parallelism of electrical(or optical) waves for parallel processing. The key to success with WPC architecture lies in finding efficient implementation of multi-wave selection function. This paper proposes a multi-wave selection circuit based on coherent detection of modulated waves. The proposed method has potential advantage of high degree of multiplexing and real-time-variable selectivity. Also, its application to the densely connected WPC architecture for minimum-latency image processing is discussed with emphasis on the reduction in the number of interconnections.
AB - This paper investigates new architecture LSIs based on wave-parallel computing(WPC) to address the interconnection problems in highly parallel VLSI systems. The underlying concept is frequency multiplexing of digital signals, which enables us to utilize the parallelism of electrical(or optical) waves for parallel processing. The key to success with WPC architecture lies in finding efficient implementation of multi-wave selection function. This paper proposes a multi-wave selection circuit based on coherent detection of modulated waves. The proposed method has potential advantage of high degree of multiplexing and real-time-variable selectivity. Also, its application to the densely connected WPC architecture for minimum-latency image processing is discussed with emphasis on the reduction in the number of interconnections.
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M3 - Conference contribution
AN - SCOPUS:0027989211
SN - 0818656522
T3 - Proceedings of The International Symposium on Multiple-Valued Logic
SP - 207
EP - 214
BT - Proceedings of The International Symposium on Multiple-Valued Logic
PB - Publ by IEEE
T2 - Proceedings of the 24th International Symposium on Multiple-Valued Logic
Y2 - 25 May 1994 through 27 May 1994
ER -