TY - GEN
T1 - Designing Secure Cryptographic Circuits
AU - Homma, N.
N1 - Funding Information:
ACKNOWLEDGMENT This work has been partially supported by JSPS KAKENHI Grant No. 17H00729.
Publisher Copyright:
© 2019 IEEE.
PY - 2019/12
Y1 - 2019/12
N2 - Hardware security in mobile and embedded systems is drawing much attention in the context of the rapid growth of Internet-of-Things. In particular, the threats of side-channel attacks are non-trivial because they can be done by relatively low-cost equipment in a non-destructive manner. In the last few decades, a variety of side-channel attacks on cryptographic circuits have been reported. This paper introduces the design of cryptographic circuits resistant to side-channel attacks, including the-state-of-the-art side-channel attacks and circuit-level countermeasures.
AB - Hardware security in mobile and embedded systems is drawing much attention in the context of the rapid growth of Internet-of-Things. In particular, the threats of side-channel attacks are non-trivial because they can be done by relatively low-cost equipment in a non-destructive manner. In the last few decades, a variety of side-channel attacks on cryptographic circuits have been reported. This paper introduces the design of cryptographic circuits resistant to side-channel attacks, including the-state-of-the-art side-channel attacks and circuit-level countermeasures.
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U2 - 10.1109/IEDM19573.2019.8993646
DO - 10.1109/IEDM19573.2019.8993646
M3 - Conference contribution
AN - SCOPUS:85081051864
T3 - Technical Digest - International Electron Devices Meeting, IEDM
BT - 2019 IEEE International Electron Devices Meeting, IEDM 2019
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 65th Annual IEEE International Electron Devices Meeting, IEDM 2019
Y2 - 7 December 2019 through 11 December 2019
ER -