TY - GEN
T1 - Development of drain current model for oxide semiconductor thin film transistors
AU - Tsuji, Hiroshi
AU - Nakajima, Yoshiki
AU - Yamamoto, Toshihiro
AU - Nakata, Mitsuru
AU - Fujisaki, Yoshihide
AU - Fujikake, Hideo
AU - Sato, Hiroto
AU - Takei, Tatsuya
PY - 2012
Y1 - 2012
N2 - A new physics-based and computationally efficient drain current model for oxide semiconductor thin film transistors (TFTs) is developed. In this model, the influence of trap states in the band gap is taken into account to reproduce the gradual increase of the subthreshold current. Analytical expressions for the trapped electron densities are used to reduce the calculation time when solving the Poisson equation. The developed drain current model includes both drift and diffusion components, and it can thus be applied to the subthreshold, linear, and saturation regions. Calculations using the model produce results that are in good agreement with the measured drain current characteristics of amorphous indium gallium zinc oxide TFTs over a wide range of gate and drain voltages. The presented model is expected to play an important role in the analysis of TFT characteristics and the design of TFT structures to realize large-sized, high quality sheet-type displays with oxide semiconductor TFT backplanes.
AB - A new physics-based and computationally efficient drain current model for oxide semiconductor thin film transistors (TFTs) is developed. In this model, the influence of trap states in the band gap is taken into account to reproduce the gradual increase of the subthreshold current. Analytical expressions for the trapped electron densities are used to reduce the calculation time when solving the Poisson equation. The developed drain current model includes both drift and diffusion components, and it can thus be applied to the subthreshold, linear, and saturation regions. Calculations using the model produce results that are in good agreement with the measured drain current characteristics of amorphous indium gallium zinc oxide TFTs over a wide range of gate and drain voltages. The presented model is expected to play an important role in the analysis of TFT characteristics and the design of TFT structures to realize large-sized, high quality sheet-type displays with oxide semiconductor TFT backplanes.
KW - Displays
KW - Semiconductor device modeling
KW - Thin film transistors
KW - Wide band gap semiconductors
UR - http://www.scopus.com/inward/record.url?scp=84871656877&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84871656877&partnerID=8YFLogxK
U2 - 10.1109/IAS.2012.6374050
DO - 10.1109/IAS.2012.6374050
M3 - Conference contribution
AN - SCOPUS:84871656877
SN - 9781467303309
T3 - Conference Record - IAS Annual Meeting (IEEE Industry Applications Society)
BT - 2012 IEEE Industry Applications Society Annual Meeting, IAS 2012
T2 - 2012 IEEE Industry Applications Society Annual Meeting, IAS 2012
Y2 - 7 October 2012 through 11 October 2012
ER -