TY - GEN
T1 - Differential power analysis of AES ASIC implementations with various S-box circuits
AU - Sugawara, Takeshi
AU - Homma, Naofumi
AU - Aoki, Takafumi
AU - Satoh, Akashi
PY - 2009
Y1 - 2009
N2 - Differential Power Analysis experiments are conducted on various ASIC implementations of AES with different S-box architectures: (i) an inverter over Galois Field GF(((22)2)2), (ii) table, (iii) PPRM (Positive Polarity Reed-Muller forms), and (iv) 3-stage PPRM. Dedicated ASIC is developed and its power is measured on the standard evaluation board SASEBO-R. The results show that the S-box implementations have a significant impact on DPA resistance. The results are also compared with that of FPGA implementations to investigate the difference between the platforms.
AB - Differential Power Analysis experiments are conducted on various ASIC implementations of AES with different S-box architectures: (i) an inverter over Galois Field GF(((22)2)2), (ii) table, (iii) PPRM (Positive Polarity Reed-Muller forms), and (iv) 3-stage PPRM. Dedicated ASIC is developed and its power is measured on the standard evaluation board SASEBO-R. The results show that the S-box implementations have a significant impact on DPA resistance. The results are also compared with that of FPGA implementations to investigate the difference between the platforms.
UR - http://www.scopus.com/inward/record.url?scp=71249161578&partnerID=8YFLogxK
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U2 - 10.1109/ECCTD.2009.5275004
DO - 10.1109/ECCTD.2009.5275004
M3 - Conference contribution
AN - SCOPUS:71249161578
SN - 9781424438969
T3 - ECCTD 2009 - European Conference on Circuit Theory and Design Conference Program
SP - 395
EP - 398
BT - ECCTD 2009 - European Conference on Circuit Theory and Design Conference Program
T2 - ECCTD 2009 - European Conference on Circuit Theory and Design Conference Program
Y2 - 23 August 2009 through 27 August 2009
ER -