Direct multichip-to-wafer 3D integration technology using flip-chip self-assembly of NCF-covered known good dies

Yuka Ito; Mariappan Murugesan; Takafumi Fukushima; Kang Wook Lee; Koji Choki; Tetsu Tanaka; Mitsumasa Koyanagi

doi:10.1109/ECTC.2014.6897434

Direct multichip-to-wafer 3D integration technology using flip-chip self-assembly of NCF-covered known good dies

Yuka Ito, Mariappan Murugesan, Takafumi Fukushima, Kang Wook Lee, Koji Choki, Tetsu Tanaka, Mitsumasa Koyanagi

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

11 Citations (Scopus)

Abstract

We demonstrated surface tension-driven self-assembly and microbump bonding using NCF (non-conductive film)-covered chips with Cu/Sn-Ag microbumps for highthroughput and high-yield direct multichip-to-wafer 3D integration. The NCF is a promising candidate to completely fill gaps between fine-pitch microbumps, and is essential for realizing highly-reliable microbump-to-microbump interconnections. Here, by applying the self-assembly method with strong water surface tension, the NCF-covered chips were precisely aligned to hydrophilic assembly sites defined on host Si substrates in a face-down manner with alignment accuracies of approximately 1 μm. The self-assembled chips having Cu/Sn-Ag microbumps covered with NCF were thermally compressed to obtain electrical joints between the chips and substrate after the self-assembly process. The resulting daisy chains showed good electrical characteristics with contact resistance of 53 mΩ/joint.

Original language	English
Title of host publication	Proceedings - Electronic Components and Technology Conference
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1148-1153
Number of pages	6
ISBN (Electronic)	9781479924073
DOIs	https://doi.org/10.1109/ECTC.2014.6897434
Publication status	Published - 2014 Sept 11
Event	64th Electronic Components and Technology Conference, ECTC 2014 - Orlando, United States Duration: 2014 May 27 → 2014 May 30

Publication series

Name	Proceedings - Electronic Components and Technology Conference
ISSN (Print)	0569-5503

Conference

Conference	64th Electronic Components and Technology Conference, ECTC 2014
Country/Territory	United States
City	Orlando
Period	14/5/27 → 14/5/30

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10.1109/ECTC.2014.6897434

Cite this

Ito, Y., Murugesan, M., Fukushima, T., Lee, K. W., Choki, K., Tanaka, T., & Koyanagi, M. (2014). Direct multichip-to-wafer 3D integration technology using flip-chip self-assembly of NCF-covered known good dies. In Proceedings - Electronic Components and Technology Conference (pp. 1148-1153). Article 6897434 (Proceedings - Electronic Components and Technology Conference). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ECTC.2014.6897434

Ito, Yuka ; Murugesan, Mariappan ; Fukushima, Takafumi et al. / Direct multichip-to-wafer 3D integration technology using flip-chip self-assembly of NCF-covered known good dies. Proceedings - Electronic Components and Technology Conference. Institute of Electrical and Electronics Engineers Inc., 2014. pp. 1148-1153 (Proceedings - Electronic Components and Technology Conference).

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title = "Direct multichip-to-wafer 3D integration technology using flip-chip self-assembly of NCF-covered known good dies",

abstract = "We demonstrated surface tension-driven self-assembly and microbump bonding using NCF (non-conductive film)-covered chips with Cu/Sn-Ag microbumps for highthroughput and high-yield direct multichip-to-wafer 3D integration. The NCF is a promising candidate to completely fill gaps between fine-pitch microbumps, and is essential for realizing highly-reliable microbump-to-microbump interconnections. Here, by applying the self-assembly method with strong water surface tension, the NCF-covered chips were precisely aligned to hydrophilic assembly sites defined on host Si substrates in a face-down manner with alignment accuracies of approximately 1 μm. The self-assembled chips having Cu/Sn-Ag microbumps covered with NCF were thermally compressed to obtain electrical joints between the chips and substrate after the self-assembly process. The resulting daisy chains showed good electrical characteristics with contact resistance of 53 mΩ/joint.",

author = "Yuka Ito and Mariappan Murugesan and Takafumi Fukushima and Lee, {Kang Wook} and Koji Choki and Tetsu Tanaka and Mitsumasa Koyanagi",

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doi = "10.1109/ECTC.2014.6897434",

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Ito, Y, Murugesan, M, Fukushima, T, Lee, KW, Choki, K, Tanaka, T & Koyanagi, M 2014, Direct multichip-to-wafer 3D integration technology using flip-chip self-assembly of NCF-covered known good dies. in Proceedings - Electronic Components and Technology Conference., 6897434, Proceedings - Electronic Components and Technology Conference, Institute of Electrical and Electronics Engineers Inc., pp. 1148-1153, 64th Electronic Components and Technology Conference, ECTC 2014, Orlando, United States, 14/5/27. https://doi.org/10.1109/ECTC.2014.6897434

Direct multichip-to-wafer 3D integration technology using flip-chip self-assembly of NCF-covered known good dies. / Ito, Yuka; Murugesan, Mariappan; Fukushima, Takafumi et al.
Proceedings - Electronic Components and Technology Conference. Institute of Electrical and Electronics Engineers Inc., 2014. p. 1148-1153 6897434 (Proceedings - Electronic Components and Technology Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Lee, Kang Wook

AU - Choki, Koji

AU - Tanaka, Tetsu

AU - Koyanagi, Mitsumasa

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N2 - We demonstrated surface tension-driven self-assembly and microbump bonding using NCF (non-conductive film)-covered chips with Cu/Sn-Ag microbumps for highthroughput and high-yield direct multichip-to-wafer 3D integration. The NCF is a promising candidate to completely fill gaps between fine-pitch microbumps, and is essential for realizing highly-reliable microbump-to-microbump interconnections. Here, by applying the self-assembly method with strong water surface tension, the NCF-covered chips were precisely aligned to hydrophilic assembly sites defined on host Si substrates in a face-down manner with alignment accuracies of approximately 1 μm. The self-assembled chips having Cu/Sn-Ag microbumps covered with NCF were thermally compressed to obtain electrical joints between the chips and substrate after the self-assembly process. The resulting daisy chains showed good electrical characteristics with contact resistance of 53 mΩ/joint.

AB - We demonstrated surface tension-driven self-assembly and microbump bonding using NCF (non-conductive film)-covered chips with Cu/Sn-Ag microbumps for highthroughput and high-yield direct multichip-to-wafer 3D integration. The NCF is a promising candidate to completely fill gaps between fine-pitch microbumps, and is essential for realizing highly-reliable microbump-to-microbump interconnections. Here, by applying the self-assembly method with strong water surface tension, the NCF-covered chips were precisely aligned to hydrophilic assembly sites defined on host Si substrates in a face-down manner with alignment accuracies of approximately 1 μm. The self-assembled chips having Cu/Sn-Ag microbumps covered with NCF were thermally compressed to obtain electrical joints between the chips and substrate after the self-assembly process. The resulting daisy chains showed good electrical characteristics with contact resistance of 53 mΩ/joint.

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ER -

Ito Y, Murugesan M, Fukushima T, Lee KW, Choki K, Tanaka T et al. Direct multichip-to-wafer 3D integration technology using flip-chip self-assembly of NCF-covered known good dies. In Proceedings - Electronic Components and Technology Conference. Institute of Electrical and Electronics Engineers Inc. 2014. p. 1148-1153. 6897434. (Proceedings - Electronic Components and Technology Conference). doi: 10.1109/ECTC.2014.6897434

Direct multichip-to-wafer 3D integration technology using flip-chip self-assembly of NCF-covered known good dies

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