Early-Stage Operation-Skipping Scheme for Low-Power Stochastic Image Processors

Daisaku Katagiri, Naoya Onizawa, Takahiro Hanyu

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review


Stochastic computation that performs in probabilistic domain has been recently exploited for area-efficient hardware implementation, while it requires large number of bits to represent probabilities, increasing the switching activity and hence power dissipation. In this paper, an early-stage operation-skipping scheme, where stochastic computation is terminated at the early stage by monitoring the intermediate computation result, is introduced for low-power stochastic image processors. In case that the proposed scheme is applied in edge-detection processing as a typical example of image processing, a non-candidate pixel is predicted using a simple threshold detector before the completion of the stochastic edge-detection process. Once the pixel is found, the edge-detection process is stopped, eliminating the stochastic computation at the rest of bits. As a design example, a Robert's operator based stochastic edge detector is implemented using MATLAB. Based on the simulation results, a correlation between an output-image quality using a peak signal-to-noise ratio (PSNR) criteria and the reduction ratio of bits is discussed.

Original languageEnglish
Title of host publicationProceedings - 2015 IEEE 45th International Symposium on Multiple-Valued Logic, ISMVL 2015
PublisherIEEE Computer Society
Number of pages6
ISBN (Electronic)9781479917778
Publication statusPublished - 2015 Sept 2
Event45th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2015 - Waterloo, Canada
Duration: 2015 May 182015 May 20

Publication series

NameProceedings of The International Symposium on Multiple-Valued Logic
ISSN (Print)0195-623X


Conference45th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2015


  • early stopping
  • image processor
  • stochastic computation


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