Embedded nonvolatile memory with STT-MRAMs and its application for nonvolatile brain-inspired VLSIs

Tetsuo Endoh

doi:10.1109/VLSI-DAT.2017.7939702

Embedded nonvolatile memory with STT-MRAMs and its application for nonvolatile brain-inspired VLSIs

Tetsuo Endoh

ENG - Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Citation (Scopus)

Abstract

Recently in semiconductor memories such as embedded memories (SRAM, e-DRAM), main memories (DRAM) and storage memories (NAND memory), it is becoming difficult to meet the target performance only by scaling technologies. Especially for high speed embedded memories, the large power consumption brings more serious issues due to rapid increase in memory capacity under multi core MPUs, operation speed and leakage current of scaled CMOS. Moreover, the speed gap between each memory levels in addition to that between the operation speed of MPUs and that of embedded memories and main memories have expanded year by year.

Original language	English
Title of host publication	2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781509039692
DOIs	https://doi.org/10.1109/VLSI-DAT.2017.7939702
Publication status	Published - 2017 Jun 5
Event	2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017 - Hsinchu, Taiwan, Province of China Duration: 2017 Apr 24 → 2017 Apr 27

Publication series

Name	2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017

Conference

Conference	2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017
Country/Territory	Taiwan, Province of China
City	Hsinchu
Period	17/4/24 → 17/4/27

Access to Document

10.1109/VLSI-DAT.2017.7939702

Cite this

Endoh, T. (2017). Embedded nonvolatile memory with STT-MRAMs and its application for nonvolatile brain-inspired VLSIs. In 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017 Article 7939702 (2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-DAT.2017.7939702

@inproceedings{a8d37f272e2649d0a5fea588d724e4fb,

title = "Embedded nonvolatile memory with STT-MRAMs and its application for nonvolatile brain-inspired VLSIs",

abstract = "Recently in semiconductor memories such as embedded memories (SRAM, e-DRAM), main memories (DRAM) and storage memories (NAND memory), it is becoming difficult to meet the target performance only by scaling technologies. Especially for high speed embedded memories, the large power consumption brings more serious issues due to rapid increase in memory capacity under multi core MPUs, operation speed and leakage current of scaled CMOS. Moreover, the speed gap between each memory levels in addition to that between the operation speed of MPUs and that of embedded memories and main memories have expanded year by year.",

author = "Tetsuo Endoh",

note = "Publisher Copyright: {\textcopyright} 2017 IEEE.; 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017 ; Conference date: 24-04-2017 Through 27-04-2017",

year = "2017",

month = jun,

day = "5",

doi = "10.1109/VLSI-DAT.2017.7939702",

language = "English",

series = "2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017",

address = "United States",

}

Endoh, T 2017, Embedded nonvolatile memory with STT-MRAMs and its application for nonvolatile brain-inspired VLSIs. in 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017., 7939702, 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017, Institute of Electrical and Electronics Engineers Inc., 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017, Hsinchu, Taiwan, Province of China, 17/4/24. https://doi.org/10.1109/VLSI-DAT.2017.7939702

Embedded nonvolatile memory with STT-MRAMs and its application for nonvolatile brain-inspired VLSIs. / Endoh, Tetsuo.
2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017. Institute of Electrical and Electronics Engineers Inc., 2017. 7939702 (2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Embedded nonvolatile memory with STT-MRAMs and its application for nonvolatile brain-inspired VLSIs

AU - Endoh, Tetsuo

PY - 2017/6/5

Y1 - 2017/6/5

N2 - Recently in semiconductor memories such as embedded memories (SRAM, e-DRAM), main memories (DRAM) and storage memories (NAND memory), it is becoming difficult to meet the target performance only by scaling technologies. Especially for high speed embedded memories, the large power consumption brings more serious issues due to rapid increase in memory capacity under multi core MPUs, operation speed and leakage current of scaled CMOS. Moreover, the speed gap between each memory levels in addition to that between the operation speed of MPUs and that of embedded memories and main memories have expanded year by year.

AB - Recently in semiconductor memories such as embedded memories (SRAM, e-DRAM), main memories (DRAM) and storage memories (NAND memory), it is becoming difficult to meet the target performance only by scaling technologies. Especially for high speed embedded memories, the large power consumption brings more serious issues due to rapid increase in memory capacity under multi core MPUs, operation speed and leakage current of scaled CMOS. Moreover, the speed gap between each memory levels in addition to that between the operation speed of MPUs and that of embedded memories and main memories have expanded year by year.

UR - http://www.scopus.com/inward/record.url?scp=85021399282&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85021399282&partnerID=8YFLogxK

U2 - 10.1109/VLSI-DAT.2017.7939702

DO - 10.1109/VLSI-DAT.2017.7939702

M3 - Conference contribution

AN - SCOPUS:85021399282

T3 - 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017

BT - 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017

Y2 - 24 April 2017 through 27 April 2017

ER -

Endoh T. Embedded nonvolatile memory with STT-MRAMs and its application for nonvolatile brain-inspired VLSIs. In 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017. Institute of Electrical and Electronics Engineers Inc. 2017. 7939702. (2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017). doi: 10.1109/VLSI-DAT.2017.7939702

Embedded nonvolatile memory with STT-MRAMs and its application for nonvolatile brain-inspired VLSIs

Abstract

Publication series

Conference

Access to Document

Other files and links

Fingerprint

Cite this