TY - GEN
T1 - Enhancing noise margins of finFET SRAM by integrating vth- controllable flexible-pass-gates
AU - Endo, Kazuhiko
AU - O'Uchi, Shin Ichi
AU - Ishikawa, Yuki
AU - Liu, Yongxum
AU - Matsukawa, Takashi
AU - Masahara, Meishoku
AU - Sakamoto, Kunihiro
AU - Tsukada, Junichi
AU - Ishii, Kenichi
AU - Yamauchi, Hiromi
AU - Suzuki, Eiichi
PY - 2008
Y1 - 2008
N2 - We propose a flexible-pass-gate (Flex-PG) FinFET SRAM to enhance both the read and write noise margins. The flip-flop in the Flex-PG SRAM cell consists of usual FinFETs while its pass gates consist of Vth- controllable four-terminal (4T) FinFETs with independent double-gates. We experimentally demonstrate that the proposed Flex-PG SRAM increases both the read and write margins by controlling the Vth of the pass gates.
AB - We propose a flexible-pass-gate (Flex-PG) FinFET SRAM to enhance both the read and write noise margins. The flip-flop in the Flex-PG SRAM cell consists of usual FinFETs while its pass gates consist of Vth- controllable four-terminal (4T) FinFETs with independent double-gates. We experimentally demonstrate that the proposed Flex-PG SRAM increases both the read and write margins by controlling the Vth of the pass gates.
UR - http://www.scopus.com/inward/record.url?scp=58049086111&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=58049086111&partnerID=8YFLogxK
U2 - 10.1109/ESSDERC.2008.4681720
DO - 10.1109/ESSDERC.2008.4681720
M3 - Conference contribution
AN - SCOPUS:58049086111
SN - 9781424423644
T3 - ESSDERC 2008 - Proceedings of the 38th European Solid-State Device Research Conference
SP - 146
EP - 149
BT - ESSDERC 2008 - Proceedings of the 38th European Solid-State Device Research Conference
PB - IEEE Computer Society
T2 - ESSDERC 2008 - 38th European Solid-State Device Research Conference
Y2 - 15 September 2008 through 19 September 2008
ER -