Evolutionary graph generation system with transmigration capability for arithmetic circuit design

Nuofumi Homma; Tukufumi Aoki; Tutsuo Higuchi

Evolutionary graph generation system with transmigration capability for arithmetic circuit design

Nuofumi Homma, Tukufumi Aoki, Tutsuo Higuchi

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

This paper presents a novel graph-based evolutionary optimization technique called Evolutionary Graph Generation (EGG), and its application to the design of fast constant-coefficient multipliers using parallel counter-tree architecture. This paper also demonstrates that the evolution process of EGG can be accelerated by a simple operation, called transmigration, which is to import previously generated good solutions for creating the other solutions.

Original language	English
Title of host publication	ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
Publisher	IEEE Computer Society
Pages	171-174
Number of pages	4
ISBN (Print)	0780366859, 9780780366855
Publication status	Published - 2001 Jan 1
Event	2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001 - Sydney, NSW, Australia Duration: 2001 May 6 → 2001 May 9

Publication series

Name	ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
Volume	5

Other

Other	2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001
Country/Territory	Australia
City	Sydney, NSW
Period	01/5/6 → 01/5/9

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials

Cite this

Homma, N., Aoki, T., & Higuchi, T. (2001). Evolutionary graph generation system with transmigration capability for arithmetic circuit design. In ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings (pp. 171-174). [922012] (ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings; Vol. 5). IEEE Computer Society.

Evolutionary graph generation system with transmigration capability for arithmetic circuit design. / Homma, Nuofumi ; Aoki, Tukufumi; Higuchi, Tutsuo.
ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings. IEEE Computer Society, 2001. p. 171-174 922012 (ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings; Vol. 5).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Homma, N , Aoki, T & Higuchi, T 2001, Evolutionary graph generation system with transmigration capability for arithmetic circuit design. in ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings., 922012, ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings, vol. 5, IEEE Computer Society, pp. 171-174, 2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001, Sydney, NSW, Australia, 01/5/6.

Homma N , Aoki T, Higuchi T. Evolutionary graph generation system with transmigration capability for arithmetic circuit design. In ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings. IEEE Computer Society. 2001. p. 171-174. 922012. (ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings).

Homma, Nuofumi ; Aoki, Tukufumi ; Higuchi, Tutsuo. / Evolutionary graph generation system with transmigration capability for arithmetic circuit design. ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings. IEEE Computer Society, 2001. pp. 171-174 (ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings).

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Evolutionary graph generation system with transmigration capability for arithmetic circuit design

Abstract

Publication series

Other

ASJC Scopus subject areas

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