TY - GEN
T1 - Fabrication of a MTJ-based multilevel resistor towards process-variaton-resilient logic LSI
AU - Natsui, Masanori
AU - Hanyu, Takahiro
N1 - Publisher Copyright:
© 2014 IEEE.
PY - 2014/10/22
Y1 - 2014/10/22
N2 - A nonvolatile multilevel resistor cell based on magnetic tunnel junction (MTJ) device is proposed for process-variation-resilient logic LSIs. The proposed cell is designed by the series-parallel connection of several 'unit' MTJ devices, and its resistance value can be changed by using only one write path. Its basic behavior is simulated by using a SPICE simulator with built-in MTJ device model. The measurement result of a fabricated TEG circuit is also demonstrated.
AB - A nonvolatile multilevel resistor cell based on magnetic tunnel junction (MTJ) device is proposed for process-variation-resilient logic LSIs. The proposed cell is designed by the series-parallel connection of several 'unit' MTJ devices, and its resistance value can be changed by using only one write path. Its basic behavior is simulated by using a SPICE simulator with built-in MTJ device model. The measurement result of a fabricated TEG circuit is also demonstrated.
KW - Beyond CMOS
KW - Logic circuit
KW - Magnetic tunnel junction device
KW - Post-process variation compensation
UR - http://www.scopus.com/inward/record.url?scp=84914689107&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84914689107&partnerID=8YFLogxK
U2 - 10.1109/NEWCAS.2014.6934084
DO - 10.1109/NEWCAS.2014.6934084
M3 - Conference contribution
AN - SCOPUS:84914689107
T3 - 2014 IEEE 12th International New Circuits and Systems Conference, NEWCAS 2014
SP - 468
EP - 471
BT - 2014 IEEE 12th International New Circuits and Systems Conference, NEWCAS 2014
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2014 12th IEEE International New Circuits and Systems Conference, NEWCAS 2014
Y2 - 22 June 2014 through 25 June 2014
ER -