Fabrication of double-gate thin-film SOI MOSFETs using wafer bonding and polishing

H. Horie; S. Ando; T. Tanaka; M. Imai; Y. Arimoto; S. Hijiya

doi:10.7567/ssdm.1991.a-6-1

Fabrication of double-gate thin-film SOI MOSFETs using wafer bonding and polishing

H. Horie, S. Ando, T. Tanaka, M. Imai, Y. Arimoto, S. Hijiya

MEN - Biomedical Engineering

Fujitsu

Research output: Contribution to conference › Paper › peer-review

18 Citations (Scopus)

Abstract

Double-gate thin-film SOI MOSFETs have been developed for high-speed CMOS-ULSI. The important processes include planarization of the bonded surface by CVD SiO₂ polishing, and low-temperature wafer bonding using BPSG film. The characteristics of the device are dramatically improved by using a double-gate structure with a 50 nm-thick Si layer. The drain current of a double-gate n-MOSFET is 3 times higher than that of a single-gate n-MOSFET. The maximum transconductance is 150 mS/mm, more than twice that of a single-gate n-MOSFET.

Original language	English
Pages	165-167
Number of pages	3
DOIs	https://doi.org/10.7567/ssdm.1991.a-6-1
Publication status	Published - 1991
Event	23rd International Conference on Solid State Devices and Materials - SSDM '91 - Yokohama, Jpn Duration: 1991 Aug 27 → 1991 Aug 29

Conference

Conference	23rd International Conference on Solid State Devices and Materials - SSDM '91
City	Yokohama, Jpn
Period	91/8/27 → 91/8/29

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10.7567/ssdm.1991.a-6-1

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title = "Fabrication of double-gate thin-film SOI MOSFETs using wafer bonding and polishing",

abstract = "Double-gate thin-film SOI MOSFETs have been developed for high-speed CMOS-ULSI. The important processes include planarization of the bonded surface by CVD SiO2 polishing, and low-temperature wafer bonding using BPSG film. The characteristics of the device are dramatically improved by using a double-gate structure with a 50 nm-thick Si layer. The drain current of a double-gate n-MOSFET is 3 times higher than that of a single-gate n-MOSFET. The maximum transconductance is 150 mS/mm, more than twice that of a single-gate n-MOSFET.",

author = "H. Horie and S. Ando and T. Tanaka and M. Imai and Y. Arimoto and S. Hijiya",

year = "1991",

doi = "10.7567/ssdm.1991.a-6-1",

language = "English",

pages = "165--167",

note = "23rd International Conference on Solid State Devices and Materials - SSDM '91 ; Conference date: 27-08-1991 Through 29-08-1991",

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T1 - Fabrication of double-gate thin-film SOI MOSFETs using wafer bonding and polishing

AU - Horie, H.

AU - Ando, S.

AU - Tanaka, T.

AU - Imai, M.

AU - Arimoto, Y.

AU - Hijiya, S.

PY - 1991

Y1 - 1991

N2 - Double-gate thin-film SOI MOSFETs have been developed for high-speed CMOS-ULSI. The important processes include planarization of the bonded surface by CVD SiO2 polishing, and low-temperature wafer bonding using BPSG film. The characteristics of the device are dramatically improved by using a double-gate structure with a 50 nm-thick Si layer. The drain current of a double-gate n-MOSFET is 3 times higher than that of a single-gate n-MOSFET. The maximum transconductance is 150 mS/mm, more than twice that of a single-gate n-MOSFET.

AB - Double-gate thin-film SOI MOSFETs have been developed for high-speed CMOS-ULSI. The important processes include planarization of the bonded surface by CVD SiO2 polishing, and low-temperature wafer bonding using BPSG film. The characteristics of the device are dramatically improved by using a double-gate structure with a 50 nm-thick Si layer. The drain current of a double-gate n-MOSFET is 3 times higher than that of a single-gate n-MOSFET. The maximum transconductance is 150 mS/mm, more than twice that of a single-gate n-MOSFET.

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DO - 10.7567/ssdm.1991.a-6-1

M3 - Paper

AN - SCOPUS:0025749775

SP - 165

EP - 167

T2 - 23rd International Conference on Solid State Devices and Materials - SSDM '91

Y2 - 27 August 1991 through 29 August 1991

ER -

Fabrication of double-gate thin-film SOI MOSFETs using wafer bonding and polishing

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