Ferroelectric-based functional pass-gate for fine-grain pipelined VLSI computation

Takahiro Hanyu; Hiromitsu Kimura; Michitaka Kameyama; Yoshikazu Fujimori; Takashi Nakamura; Hidemi Takasu

Ferroelectric-based functional pass-gate for fine-grain pipelined VLSI computation

Takahiro Hanyu, Hiromitsu Kimura, Michitaka Kameyama, Yoshikazu Fujimori, Takashi Nakamura, Hidemi Takasu

RIEC - Computing System Platforms Division

Tohoku University

Research output: Contribution to journal › Conference article › peer-review

10 Citations (Scopus)

Abstract

A functional pass-gate based on ferroelectrics for fine grain pipelined very large scale integration (VLSI) computation is discussed. A potential application of the VLSI computation is shown using a 250 MHz pipelined multiplier with 16 pipeline stages. The pipeline pitch is found by the delay of a single functional pass gate. The timing diagram in which the basic behavior of the proposed ferroelectric based serial adder is also demonstrated.

Original language	English
Pages (from-to)	208-209+460+195
Journal	Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Publication status	Published - 2002
Event	2002 IEEE International Solid-State Circuits Conference - San Francisco, CA, United States Duration: 2002 Feb 3 → 2002 Feb 7

Cite this

@article{232f6c5c62fd40d1a299dfd1f3ed6b8d,

title = "Ferroelectric-based functional pass-gate for fine-grain pipelined VLSI computation",

abstract = "A functional pass-gate based on ferroelectrics for fine grain pipelined very large scale integration (VLSI) computation is discussed. A potential application of the VLSI computation is shown using a 250 MHz pipelined multiplier with 16 pipeline stages. The pipeline pitch is found by the delay of a single functional pass gate. The timing diagram in which the basic behavior of the proposed ferroelectric based serial adder is also demonstrated.",

author = "Takahiro Hanyu and Hiromitsu Kimura and Michitaka Kameyama and Yoshikazu Fujimori and Takashi Nakamura and Hidemi Takasu",

year = "2002",

language = "English",

pages = "208--209+460+195",

journal = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference",

issn = "0193-6530",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "2002 IEEE International Solid-State Circuits Conference ; Conference date: 03-02-2002 Through 07-02-2002",

}

TY - JOUR

T1 - Ferroelectric-based functional pass-gate for fine-grain pipelined VLSI computation

AU - Hanyu, Takahiro

AU - Kimura, Hiromitsu

AU - Kameyama, Michitaka

AU - Fujimori, Yoshikazu

AU - Nakamura, Takashi

AU - Takasu, Hidemi

PY - 2002

Y1 - 2002

N2 - A functional pass-gate based on ferroelectrics for fine grain pipelined very large scale integration (VLSI) computation is discussed. A potential application of the VLSI computation is shown using a 250 MHz pipelined multiplier with 16 pipeline stages. The pipeline pitch is found by the delay of a single functional pass gate. The timing diagram in which the basic behavior of the proposed ferroelectric based serial adder is also demonstrated.

AB - A functional pass-gate based on ferroelectrics for fine grain pipelined very large scale integration (VLSI) computation is discussed. A potential application of the VLSI computation is shown using a 250 MHz pipelined multiplier with 16 pipeline stages. The pipeline pitch is found by the delay of a single functional pass gate. The timing diagram in which the basic behavior of the proposed ferroelectric based serial adder is also demonstrated.

UR - http://www.scopus.com/inward/record.url?scp=0036102256&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0036102256&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:0036102256

SN - 0193-6530

SP - 208-209+460+195

JO - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

JF - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

T2 - 2002 IEEE International Solid-State Circuits Conference

Y2 - 3 February 2002 through 7 February 2002

ER -

Ferroelectric-based functional pass-gate for fine-grain pipelined VLSI computation

Abstract

Other files and links

Fingerprint

Cite this