Abstract
The flattening speed of the low temperature atomically flattening technology is evaluated in order to apply atomically flat surface of (1 0 0) orientation on large-diameter silicon wafers to the LSI manufacturing. The atomically flatness of the whole surface of wafers with the diameter of 200 mm can be obtained after annealing at 800 °C or above. The process time required to obtain the atomically flatness for the whole wafer surface can be shortened by increasing the annealing temperature as well as by increasing the gas flow rate. With the off angle of 0.50° or below, it was found that only mono-atomic steps appear on the surfaces and the flattening speed is independent of the off angle. These indicate that the process speed is independent of the migration speed of Si atoms on the surface, but depends on the gas replacement efficiency near the Si surface in this technique.
Original language | English |
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Pages (from-to) | 3133-3139 |
Number of pages | 7 |
Journal | Microelectronic Engineering |
Volume | 88 |
Issue number | 10 |
DOIs | |
Publication status | Published - 2011 Oct |
Keywords
- Atomically flat
- Low temperature
- MOS
- Silicon
- Surface