TY - GEN
T1 - Fully parallel 6T-2MTJ nonvolatile TCAM with single-transistor-based self match-line discharge control
AU - Matsunaga, Shoun
AU - Katsumata, Akira
AU - Natsui, Masanori
AU - Fukami, Shunsuke
AU - Endoh, Tetsuo
AU - Ohno, Hideo
AU - Hanyu, Takahiro
PY - 2011
Y1 - 2011
N2 - A six-MOS-transistor/two-MTJ-device (6T-2MTJ)-based cell circuit with an autonomous leakage-current control mechanism is proposed and fabricated for a fully parallel nonvolatile TCAM. A diode-connected nMOS transistor is inserted into each cell for match-line discharge control, which enables bit-parallel equality-search operation more than 144 bits. Since each match line is divided into three segments, the activity rate of cells is reduced to 2.8%. This almost eliminates leakage power while maintaining comparable search energy of 1.04 fJ/bit/search in comparison with a CMOS-based TCAM.
AB - A six-MOS-transistor/two-MTJ-device (6T-2MTJ)-based cell circuit with an autonomous leakage-current control mechanism is proposed and fabricated for a fully parallel nonvolatile TCAM. A diode-connected nMOS transistor is inserted into each cell for match-line discharge control, which enables bit-parallel equality-search operation more than 144 bits. Since each match line is divided into three segments, the activity rate of cells is reduced to 2.8%. This almost eliminates leakage power while maintaining comparable search energy of 1.04 fJ/bit/search in comparison with a CMOS-based TCAM.
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M3 - Conference contribution
AN - SCOPUS:80052671472
SN - 9784863481657
T3 - IEEE Symposium on VLSI Circuits, Digest of Technical Papers
SP - 298
EP - 299
BT - 2011 Symposium on VLSI Circuits, VLSIC 2011 - Digest of Technical Papers
T2 - 2011 Symposium on VLSI Circuits, VLSIC 2011
Y2 - 15 June 2011 through 17 June 2011
ER -