Future high density memory with vertical structured device technology

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

For the past thirty years, the downscaling has been the guiding principle in the field of High-density semiconductor memories. However, recently, the limit of planar bulk MOSFETs is becoming apparent. Therefore, in order to extend the scalability of memory technology to the nano-scale generation, a new device structure is necessary. From the viewpoint, I will discuss future High density Memory with Vertical structured device technology.

Original languageEnglish
Title of host publicationICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings
Pages1051-1054
Number of pages4
DOIs
Publication statusPublished - 2010
Event2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology - Shanghai, China
Duration: 2010 Nov 12010 Nov 4

Publication series

NameICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings

Conference

Conference2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology
Country/TerritoryChina
CityShanghai
Period10/11/110/11/4

Fingerprint

Dive into the research topics of 'Future high density memory with vertical structured device technology'. Together they form a unique fingerprint.

Cite this